RA now chooses GEN_OR_VSX_REGS in most cases. This is great in most
cases, but we often (or always?) use {l,st}{f,xs}iwzx now, which is
problematic because the integer load and store insns can use cheaper
addressing modes. We can fix that by putting a small penalty on the
instruction alternatives for those.
Doing one final testsuite run on this now, will commit to trunk once
that finishes. It probably will need some backports as well.
Segher
2022-04-12 Segher Boessenkool <seg...@kernel.crashing.org>
PR target/103197
PR target/102146
* config/rs6000/rs6000.md (*movsi_internal1): Disparage the "Z"
alternatives in {l,st}{f,xs}iwzx.
(movsd_hardfloat): Ditto.
---
gcc/config/rs6000/rs6000.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index f05b8358ba0a..2bb1199e7d01 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7496,7 +7496,7 @@ (define_insn "*movsi_internal1"
[(set (match_operand:SI 0 "nonimmediate_operand"
"=r, r,
r, d, v,
- m, Z, Z,
+ m, ?Z, ?Z,
r, r, r, r,
wa, wa, wa, v,
wa, v, v,
@@ -7504,7 +7504,7 @@ (define_insn "*movsi_internal1"
r, *h, *h")
(match_operand:SI 1 "input_operand"
"r, U,
- m, Z, Z,
+ m, ?Z, ?Z,
r, d, v,
I, L, eI, n,
wa, O, wM, wB,
@@ -7973,10 +7973,10 @@ (define_insn "movsf_hardfloat"
;; FMR MR MT%0 MF%1 NOP
(define_insn "movsd_hardfloat"
[(set (match_operand:SD 0 "nonimmediate_operand"
- "=!r, d, m, Z, ?d, ?r,
+ "=!r, d, m, ?Z, ?d, ?r,
f, !r, *c*l, !r, *h")
(match_operand:SD 1 "input_operand"
- "m, Z, r, wx, r, d,
+ "m, ?Z, r, wx, r, d,
f, r, r, *h, 0"))]
"(register_operand (operands[0], SDmode)
|| register_operand (operands[1], SDmode))
--
1.8.3.1
