+(define_split
+ [(match_operand 0 "small_data_pattern")]
+ "reload_completed"
+ [(match_dup 0)]
+ { operands[0] = loongarch_rewrite_small_data (operands[0]); })
+
+
+;; Match paired HI/SI/SF/DFmode load/stores.
+(define_insn "*join2_load_store<JOIN_MODE:mode>"
+ [(set (match_operand:JOIN_MODE 0 "nonimmediate_operand"
+ "=r,f,m,m,r,ZC,r,k,f,k")
+ (match_operand:JOIN_MODE 1 "nonimmediate_operand"
"m,m,r,f,ZC,r,k,r,k,f"))
+ (set (match_operand:JOIN_MODE 2 "nonimmediate_operand"
+ "=r,f,m,m,r,ZC,r,k,f,k")
+ (match_operand:JOIN_MODE 3 "nonimmediate_operand"
"m,m,r,f,ZC,r,k,r,k,f"))]
+ "reload_completed"
+ {
+ bool load_p = (which_alternative == 0 || which_alternative == 1);
+ /* Reg-renaming pass reuses base register if it is dead after bonded loads.
+ Hardware does not bond those loads, even when they are consecutive.
+ However, order of the loads need to be checked for correctness. */
+ if (!load_p || !reg_overlap_mentioned_p (operands[0], operands[1]))
+ {