ping^1
On Fri, Feb 25, 2022 at 1:51 PM Hongtao Liu <crazy...@gmail.com> wrote:
>
> On Fri, Feb 25, 2022 at 1:50 PM liuhongt <hongtao....@intel.com> wrote:
> >
> > The patch fixes ICE in ix86_gimple_fold_builtin.
> >
> Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
> Ok for main trunk?
>
> > gcc/ChangeLog:
> >
> > PR target/104666
> > * config/i386/i386-expand.cc
> > (ix86_check_builtin_isa_match): New func.
> > (ix86_expand_builtin): Move code to
> > ix86_check_builtin_isa_match and call it.
> > * config/i386/i386-protos.h
> > (ix86_check_builtin_isa_match): Declare.
> > * config/i386/i386.cc (ix86_gimple_fold_builtin): Don't fold
> > builtin into gimple when isa mismatches.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/i386/pr104666.c: New test.
> > ---
> > gcc/config/i386/i386-expand.cc | 97 ++++++++++++++----------
> > gcc/config/i386/i386-protos.h | 5 ++
> > gcc/config/i386/i386.cc | 4 +
> > gcc/testsuite/gcc.target/i386/pr104666.c | 49 ++++++++++++
> > 4 files changed, 115 insertions(+), 40 deletions(-)
> > create mode 100644 gcc/testsuite/gcc.target/i386/pr104666.c
> >
> > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
> > index faa0191c6dd..1d132f0181d 100644
> > --- a/gcc/config/i386/i386-expand.cc
> > +++ b/gcc/config/i386/i386-expand.cc
> > @@ -12232,46 +12232,14 @@ ix86_expand_vec_set_builtin (tree exp)
> > return target;
> > }
> >
> > -/* Expand an expression EXP that calls a built-in function,
> > - with result going to TARGET if that's convenient
> > - (and in mode MODE if that's convenient).
> > - SUBTARGET may be used as the target for computing one of EXP's operands.
> > - IGNORE is nonzero if the value is to be ignored. */
> > -
> > -rtx
> > -ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
> > - machine_mode mode, int ignore)
> > +/* Return true if the necessary isa options for this builtin exist,
> > + else false.
> > + fcode = DECL_MD_FUNCTION_CODE (fndecl); */
> > +bool
> > +ix86_check_builtin_isa_match (unsigned int fcode,
> > + HOST_WIDE_INT* pbisa,
> > + HOST_WIDE_INT* pbisa2)
> > {
> > - size_t i;
> > - enum insn_code icode, icode2;
> > - tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
> > - tree arg0, arg1, arg2, arg3, arg4;
> > - rtx op0, op1, op2, op3, op4, pat, pat2, insn;
> > - machine_mode mode0, mode1, mode2, mode3, mode4;
> > - unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
> > -
> > - /* For CPU builtins that can be folded, fold first and expand the fold.
> > */
> > - switch (fcode)
> > - {
> > - case IX86_BUILTIN_CPU_INIT:
> > - {
> > - /* Make it call __cpu_indicator_init in libgcc. */
> > - tree call_expr, fndecl, type;
> > - type = build_function_type_list (integer_type_node, NULL_TREE);
> > - fndecl = build_fn_decl ("__cpu_indicator_init", type);
> > - call_expr = build_call_expr (fndecl, 0);
> > - return expand_expr (call_expr, target, mode, EXPAND_NORMAL);
> > - }
> > - case IX86_BUILTIN_CPU_IS:
> > - case IX86_BUILTIN_CPU_SUPPORTS:
> > - {
> > - tree arg0 = CALL_EXPR_ARG (exp, 0);
> > - tree fold_expr = fold_builtin_cpu (fndecl, &arg0);
> > - gcc_assert (fold_expr != NULL_TREE);
> > - return expand_expr (fold_expr, target, mode, EXPAND_NORMAL);
> > - }
> > - }
> > -
> > HOST_WIDE_INT isa = ix86_isa_flags;
> > HOST_WIDE_INT isa2 = ix86_isa_flags2;
> > HOST_WIDE_INT bisa = ix86_builtins_isa[fcode].isa;
> > @@ -12321,7 +12289,56 @@ ix86_expand_builtin (tree exp, rtx target, rtx
> > subtarget,
> > bisa |= OPTION_MASK_ISA_SSE2;
> > }
> >
> > - if ((bisa & isa) != bisa || (bisa2 & isa2) != bisa2)
> > + if (pbisa)
> > + *pbisa = bisa;
> > + if (pbisa2)
> > + *pbisa2 = bisa2;
> > +
> > + return (bisa & isa) == bisa && (bisa2 & isa2) == bisa2;
> > +}
> > +
> > +/* Expand an expression EXP that calls a built-in function,
> > + with result going to TARGET if that's convenient
> > + (and in mode MODE if that's convenient).
> > + SUBTARGET may be used as the target for computing one of EXP's operands.
> > + IGNORE is nonzero if the value is to be ignored. */
> > +
> > +rtx
> > +ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
> > + machine_mode mode, int ignore)
> > +{
> > + size_t i;
> > + enum insn_code icode, icode2;
> > + tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
> > + tree arg0, arg1, arg2, arg3, arg4;
> > + rtx op0, op1, op2, op3, op4, pat, pat2, insn;
> > + machine_mode mode0, mode1, mode2, mode3, mode4;
> > + unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
> > + HOST_WIDE_INT bisa, bisa2;
> > +
> > + /* For CPU builtins that can be folded, fold first and expand the fold.
> > */
> > + switch (fcode)
> > + {
> > + case IX86_BUILTIN_CPU_INIT:
> > + {
> > + /* Make it call __cpu_indicator_init in libgcc. */
> > + tree call_expr, fndecl, type;
> > + type = build_function_type_list (integer_type_node, NULL_TREE);
> > + fndecl = build_fn_decl ("__cpu_indicator_init", type);
> > + call_expr = build_call_expr (fndecl, 0);
> > + return expand_expr (call_expr, target, mode, EXPAND_NORMAL);
> > + }
> > + case IX86_BUILTIN_CPU_IS:
> > + case IX86_BUILTIN_CPU_SUPPORTS:
> > + {
> > + tree arg0 = CALL_EXPR_ARG (exp, 0);
> > + tree fold_expr = fold_builtin_cpu (fndecl, &arg0);
> > + gcc_assert (fold_expr != NULL_TREE);
> > + return expand_expr (fold_expr, target, mode, EXPAND_NORMAL);
> > + }
> > + }
> > +
> > + if (!ix86_check_builtin_isa_match (fcode, &bisa, &bisa2))
> > {
> > bool add_abi_p = bisa & OPTION_MASK_ISA_64BIT;
> > if (TARGET_ABI_X32)
> > diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
> > index d5e11259a5a..3596ce81ecf 100644
> > --- a/gcc/config/i386/i386-protos.h
> > +++ b/gcc/config/i386/i386-protos.h
> > @@ -53,6 +53,7 @@ extern bool ix86_using_red_zone (void);
> > extern rtx ix86_gen_scratch_sse_rtx (machine_mode);
> >
> > extern unsigned int ix86_regmode_natural_size (machine_mode);
> > +extern bool ix86_check_builtin_isa_match (unsigned int fcode);
> > #ifdef RTX_CODE
> > extern int standard_80387_constant_p (rtx);
> > extern const char *standard_80387_constant_opcode (rtx);
> > @@ -405,3 +406,7 @@ extern rtl_opt_pass
> > *make_pass_remove_partial_avx_dependency
> > (gcc::context *);
> >
> > extern bool ix86_has_no_direct_extern_access;
> > +
> > +/* In i386-expand.cc. */
> > +bool ix86_check_builtin_isa_match (unsigned int, HOST_WIDE_INT*,
> > + HOST_WIDE_INT*);
> > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> > index b2bf90576d5..a0700c17d74 100644
> > --- a/gcc/config/i386/i386.cc
> > +++ b/gcc/config/i386/i386.cc
> > @@ -18283,6 +18283,10 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator
> > *gsi)
> > bool is_vshift;
> > unsigned HOST_WIDE_INT elems;
> >
> > + /* Don't fold when there's isa mismatch. */
> > + if (!ix86_check_builtin_isa_match (fn_code, NULL, NULL))
> > + return false;
> > +
> > switch (fn_code)
> > {
> > case IX86_BUILTIN_TZCNT32:
> > diff --git a/gcc/testsuite/gcc.target/i386/pr104666.c
> > b/gcc/testsuite/gcc.target/i386/pr104666.c
> > new file mode 100644
> > index 00000000000..cfde907e616
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr104666.c
> > @@ -0,0 +1,49 @@
> > +/* { dg-do compile } */
> > +/* { dg-options "-O2 -mno-sse --no-warning" } */
> > +
> > +typedef double __m128d __attribute__((__vector_size__(16), __may_alias__));
> > +typedef double __m256d __attribute__((__vector_size__(32), __may_alias__));
> > +
> > +typedef float __m128 __attribute__((__vector_size__(16), __may_alias__));
> > +typedef float __m256 __attribute__((__vector_size__(32), __may_alias__));
> > +
> > +typedef char __m128i __attribute__((__vector_size__(16), __may_alias__));
> > +typedef char __m256i __attribute__((__vector_size__(32), __may_alias__));
> > +
> > +__m128d sse4_1_blendvpd (__m128d a, __m128d b, __m128d c)
> > __attribute__((__target__("avx2")));
> > +
> > +__m128d
> > +generic_blendvpd (__m128d a, __m128d b, __m128d c) /* { dg-error "SSE
> > register return with SSE disabled" "" { target { ! ia32 } } } */
> > +{
> > + return __builtin_ia32_blendvpd (a, b, c); /* { dg-error "needs isa
> > option -msse4.1" "" { target ia32 } } */
> > +}
> > +
> > +__m128
> > +generic_blendvps (__m128 a, __m128 b, __m128 c)
> > +{
> > + return __builtin_ia32_blendvps (a, b, c); /* { dg-error "needs isa
> > option -msse4.1" "" { target ia32 } } */
> > +}
> > +
> > +__m128i
> > +generic_pblendvb (__m128i a, __m128i b, __m128i c)
> > +{
> > + return __builtin_ia32_pblendvb128 (a, b, c);/* { dg-error "needs isa
> > option -msse4.1" "" { target ia32 } } */
> > +}
> > +
> > +__m256i
> > +generic_pblendvb256 (__m256i a, __m256i b, __m256i c)
> > +{
> > + return __builtin_ia32_pblendvb256 (a, b, c);/* { dg-error "needs isa
> > option -mavx2" "" { target ia32 } } */
> > +}
> > +
> > +__m256d
> > +generic_blendvpd256 (__m256d a, __m256d b, __m256d c)
> > +{
> > + return __builtin_ia32_blendvpd256 (a, b, c);/* { dg-error "needs isa
> > option -mavx" "" { target ia32 } } */
> > +}
> > +
> > +__m256
> > +generic_blendvps256 (__m256 a, __m256 b, __m256 c)
> > +{
> > + return __builtin_ia32_blendvps256 (a, b, c);/* { dg-error "needs isa
> > option -mavx" "" { target ia32 } } */
> > +}
> > --
> > 2.18.1
> >
>
>
> --
> BR,
> Hongtao
--
BR,
Hongtao
