From: yulong-plct <yul...@nj.iscas.ac.cn>
This commit adds testcases about CMO instructions.
7
8 gcc/testsuite/ChangeLog:
9
10 * gcc.target/riscv/cmo-zicbom-1.c: New test.
11 * gcc.target/riscv/cmo-zicbom-2.c: New test.
12 * gcc.target/riscv/cmo-zicbop-1.c: New test.
13 * gcc.target/riscv/cmo-zicbop-2.c: New test.
14 * gcc.target/riscv/cmo-zicboz-1.c: New test.
15 * gcc.target/riscv/cmo-zicboz-2.c: New test.
---
gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 21 +++++++++++++++++
gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 21 +++++++++++++++++
gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c | 23 +++++++++++++++++++
gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c | 23 +++++++++++++++++++
gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 9 ++++++++
gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 9 ++++++++
6 files changed, 106 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
new file mode 100644
index 00000000000..16935ff3d31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */
+
+int foo1()
+{
+ return __builtin_riscv_clean();
+}
+
+int foo2()
+{
+ return __builtin_riscv_flush();
+}
+
+int foo3()
+{
+ return __builtin_riscv_inval();
+}
+
+/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
new file mode 100644
index 00000000000..fc14f2b9c2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */
+
+int foo1()
+{
+ return __builtin_riscv_clean();
+}
+
+int foo2()
+{
+ return __builtin_riscv_flush();
+}
+
+int foo3()
+{
+ return __builtin_riscv_inval();
+}
+
+/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
new file mode 100644
index 00000000000..b8bac2e8c51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile target { { rv64-*-*}}} */
+/* { dg-options "-march=rv64gc_zicbop -mabi=lp64" } */
+
+void foo (char *p)
+{
+ __builtin_prefetch (p, 0, 0);
+ __builtin_prefetch (p, 0, 1);
+ __builtin_prefetch (p, 0, 2);
+ __builtin_prefetch (p, 0, 3);
+ __builtin_prefetch (p, 1, 0);
+ __builtin_prefetch (p, 1, 1);
+ __builtin_prefetch (p, 1, 2);
+ __builtin_prefetch (p, 1, 3);
+}
+
+int foo1()
+{
+ return __builtin_riscv_prefetchi(1);
+}
+
+/* { dg-final { scan-assembler-times "prefetch.i" 1 } } */
+/* { dg-final { scan-assembler-times "prefetch.r" 4 } } */
+/* { dg-final { scan-assembler-times "prefetch.w" 4 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
new file mode 100644
index 00000000000..5ace6e2b349
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile target { { rv32-*-*}}} */
+/* { dg-options "-march=rv32gc_zicbop -mabi=ilp32" } */
+
+void foo (char *p)
+{
+ __builtin_prefetch (p, 0, 0);
+ __builtin_prefetch (p, 0, 1);
+ __builtin_prefetch (p, 0, 2);
+ __builtin_prefetch (p, 0, 3);
+ __builtin_prefetch (p, 1, 0);
+ __builtin_prefetch (p, 1, 1);
+ __builtin_prefetch (p, 1, 2);
+ __builtin_prefetch (p, 1, 3);
+}
+
+int foo1()
+{
+ return __builtin_riscv_prefetchi(1);
+}
+
+/* { dg-final { scan-assembler-times "prefetch.i" 1 } } */
+/* { dg-final { scan-assembler-times "prefetch.r" 4 } } */
+/* { dg-final { scan-assembler-times "prefetch.w" 4 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
new file mode 100644
index 00000000000..c2401fe0cf9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */
+
+int foo1()
+{
+ return __builtin_riscv_zero();
+}
+
+/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
new file mode 100644
index 00000000000..98fb3bf978a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */
+
+int foo1()
+{
+ return __builtin_riscv_zero();
+}
+
+/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
\ No newline at end of file
--
2.17.1
