RE: [PATCH][GCC] aarch64: fix: ls64 tests fail on aarch64-linux-gnu_ilp32 [PR103729]

[Przemyslaw Wirkus via Gcc-patches]

Ping :)

> This patch is sorting issue with LS64 intrinsics tests failing with
> aarch64-linux-gnu_ilp32 target.
>
> Regtested on aarch64-linux-gnu_ilp32, aarch64-elf and aarch64_be-elf
> and no issues.
>
> OK to install?
>
> gcc/ChangeLog:
>
>                PR target/103729
>                * config/aarch64/aarch64-builtins.c 
>(aarch64_expand_builtin_ls64):
>                Handle SImode for ILP32.

--- 

diff --git a/gcc/config/aarch64/aarch64-builtins.c 
b/gcc/config/aarch64/aarch64-builtins.c
index 
0d09fe9dd6dd65c655f5bd0b9a622e7550b61a4b..58bcd99d25b79191589cf9bf8a99db4f4b6a6ba1
 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -2216,7 +2216,8 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx 
target)
       {
         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
         create_output_operand (&ops[0], target, V8DImode);
-        create_input_operand (&ops[1], op0, DImode);
+        create_input_operand (&ops[1],
+            GET_MODE (op0) == SImode ? gen_reg_rtx (DImode) : op0, DImode);
         expand_insn (CODE_FOR_ld64b, 2, ops);
         return ops[0].value;
       }
@@ -2234,7 +2235,8 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx 
target)
         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
         create_output_operand (&ops[0], target, DImode);
-        create_input_operand (&ops[1], op0, DImode);
+        create_input_operand (&ops[1],
+            GET_MODE (op0) == SImode ? gen_reg_rtx (DImode) : op0, DImode);
         create_input_operand (&ops[2], op1, V8DImode);
         expand_insn (CODE_FOR_st64bv, 3, ops);
         return ops[0].value;
@@ -2244,7 +2246,8 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx 
target)
         rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
         rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
         create_output_operand (&ops[0], target, DImode);
-        create_input_operand (&ops[1], op0, DImode);
+        create_input_operand (&ops[1],
+            GET_MODE (op0) == SImode ? gen_reg_rtx (DImode) : op0, DImode);
         create_input_operand (&ops[2], op1, V8DImode);
         expand_insn (CODE_FOR_st64bv0, 3, ops);
         return ops[0].value;