Hi Christophe,
On 13/01/2022 14:56, Christophe Lyon via Gcc-patches wrote:
diff --git a/gcc/config/arm/arm-simd-builtin-types.def
b/gcc/config/arm/arm-simd-builtin-types.def
index 6ba6f211531..920c2a68e4c 100644
--- a/gcc/config/arm/arm-simd-builtin-types.def
+++ b/gcc/config/arm/arm-simd-builtin-types.def
@@ -51,3 +51,7 @@
ENTRY (Bfloat16x2_t, V2BF, none, 32, bfloat16, 20)
ENTRY (Bfloat16x4_t, V4BF, none, 64, bfloat16, 20)
ENTRY (Bfloat16x8_t, V8BF, none, 128, bfloat16, 20)
+
+ ENTRY (Pred1x16_t, V16BI, unsigned, 16, uint16, 21)
+ ENTRY (Pred2x8_t, V8BI, unsigned, 8, uint16, 21)
+ ENTRY (Pred4x4_t, V4BI, unsigned, 4, uint16, 21)
I'm trying to lower masked loads and when I tried to use the
arm_simd_types[Pred1x16_t].itype as the mask type I noticed the
TYPE_SIZE of that is 256, rather than the expected 16. Instead I used
truth_type_for (arm_simd_types[Uint8x16_t].itype) and that gives me a
compatible vector of booleans. So the itype for Pred1x16_t seems wrong
to me.
