On 12/01/2022 12:59, Martin Liška wrote:
Hello.

We've got -Wformat-diag for some time and I think we should start using it
in -Werror for GCC bootstrap. The following patch removes last pieces of the warning
for ARM target.




> diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
> index 9c645722230..ab5c469b1ba 100644
> --- a/gcc/config/arm/arm-builtins.c
> +++ b/gcc/config/arm/arm-builtins.c
> @@ -3013,7 +3013,7 @@ constant_arg:
>                 else
>                   error_at (EXPR_LOCATION (exp),
>                         "coproc must be a constant immediate in "
> -                      "range [0-%d] enabled with +cdecp<N>",
> +                      "range [0-%d] enabled with +cdecp%<N%>",
>                         ARM_CDE_CONST_COPROC);
>               }
>                 else

I'm not sure about this hunk. It changes a literal '<'...'>' into quotes. The text is trying to say you substitute <N> with a digit in the range shown. Closer would be:

     "range [0-%d] enabled with %<+cdecp<N>%>"

The other changes look OK.

R.

Ready to be installed?
Thanks,
Martin

gcc/ChangeLog:

     * common/config/arm/arm-common.c (arm_target_mode): Wrap
     keywords with %<, %> and remove trailing punctuation char.
     (arm_canon_arch_option_1): Likewise.
     (arm_asm_auto_mfpu): Likewise.
     * config/arm/arm-builtins.c (arm_expand_builtin): Likewise.
     * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Likewise.
     (use_vfp_abi): Likewise.
     (aapcs_vfp_is_call_or_return_candidate): Likewise.
     (arm_handle_cmse_nonsecure_entry): Likewise.
     (arm_handle_cmse_nonsecure_call): Likewise.
     (thumb1_md_asm_adjust): Likewise.
---
  gcc/common/config/arm/arm-common.c | 12 +++----
  gcc/config/arm/arm-builtins.c      | 50 +++++++++++++++---------------
  gcc/config/arm/arm.c               | 12 +++----
  3 files changed, 37 insertions(+), 37 deletions(-)

diff --git a/gcc/common/config/arm/arm-common.c b/gcc/common/config/arm/arm-common.c
index e7e19400263..6a898d8554b 100644
--- a/gcc/common/config/arm/arm-common.c
+++ b/gcc/common/config/arm/arm-common.c
@@ -286,7 +286,7 @@ arm_target_mode (int argc, const char **argv)

    if (argc % 2 != 0)
      fatal_error (input_location,
-         "%%:target_mode_check takes an even number of parameters");
+         "%%:%<target_mode_check%> takes an even number of parameters");

    while (argc)
      {
@@ -295,8 +295,8 @@ arm_target_mode (int argc, const char **argv)
        else if (strcmp (argv[0], "cpu") == 0)
      cpu = argv[1];
        else
-    fatal_error (input_location,
-             "unrecognized option passed to %%:target_mode_check");
+    fatal_error (input_location, "unrecognized option passed to %%:"
+             "%<target_mode_check%%>>");
        argc -= 2;
        argv += 2;
      }
@@ -662,7 +662,7 @@ arm_canon_arch_option_1 (int argc, const char **argv, bool arch_for_multilib)

    if (argc & 1)
      fatal_error (input_location,
-         "%%:canon_for_mlib takes 1 or more pairs of parameters");
+         "%%:%<canon_for_mlib%> takes 1 or more pairs of parameters");

    while (argc)
      {
@@ -676,7 +676,7 @@ arm_canon_arch_option_1 (int argc, const char **argv, bool arch_for_multilib)
      abi = argv[1];
        else
      fatal_error (input_location,
-             "unrecognized operand to %%:canon_for_mlib");
+             "unrecognized operand to %%:%<canon_for_mlib%>");

        argc -= 2;
        argv += 2;
@@ -1032,7 +1032,7 @@ arm_asm_auto_mfpu (int argc, const char **argv)
      arch = argv[1];
        else
      fatal_error (input_location,
-             "unrecognized operand to %%:asm_auto_mfpu");
+             "unrecognized operand to %%:%<asm_auto_mfpu%>");
        argc -= 2;
        argv += 2;
      }
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 9c645722230..ab5c469b1ba 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -3013,7 +3013,7 @@ constant_arg:
                else
                  error_at (EXPR_LOCATION (exp),
                        "coproc must be a constant immediate in "
-                      "range [0-%d] enabled with +cdecp<N>",
+                      "range [0-%d] enabled with +cdecp%<N%>",
                        ARM_CDE_CONST_COPROC);
              }
                else
@@ -3860,60 +3860,60 @@ arm_expand_builtin (tree exp,
            && (imm < 0 || imm > 32))
          {
            if (fcode == ARM_BUILTIN_WRORHI)
-        error ("the range of count should be in 0 to 32.  please check the intrinsic _mm_rori_pi16 in code."); +        error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_rori_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WRORWI)
-        error ("the range of count should be in 0 to 32.  please check the intrinsic _mm_rori_pi32 in code."); +        error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_rori_pi32%> in code");
            else if (fcode == ARM_BUILTIN_WRORH)
-        error ("the range of count should be in 0 to 32.  please check the intrinsic _mm_ror_pi16 in code."); +        error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_ror_pi16%> in code");
            else
-        error ("the range of count should be in 0 to 32.  please check the intrinsic _mm_ror_pi32 in code."); +        error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_ror_pi32%> in code");
          }
       else if ((fcode == ARM_BUILTIN_WRORDI || fcode == ARM_BUILTIN_WRORD)
             && (imm < 0 || imm > 64))
          {
            if (fcode == ARM_BUILTIN_WRORDI)
-        error ("the range of count should be in 0 to 64.  please check the intrinsic _mm_rori_si64 in code."); +        error ("the range of count should be in 0 to 64; please check the intrinsic %<_mm_rori_si64%> in code");
            else
-        error ("the range of count should be in 0 to 64.  please check the intrinsic _mm_ror_si64 in code."); +        error ("the range of count should be in 0 to 64; please check the intrinsic %<_mm_ror_si64%> in code");
          }
        else if (imm < 0)
          {
            if (fcode == ARM_BUILTIN_WSRLHI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srli_pi16 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WSRLWI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srli_pi32 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_pi32%> in code");
            else if (fcode == ARM_BUILTIN_WSRLDI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srli_si64 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_si64%> in code");
            else if (fcode == ARM_BUILTIN_WSLLHI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_slli_pi16 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WSLLWI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_slli_pi32 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_pi32%> in code");
            else if (fcode == ARM_BUILTIN_WSLLDI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_slli_si64 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_si64%> in code");
            else if (fcode == ARM_BUILTIN_WSRAHI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srai_pi16 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WSRAWI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srai_pi32 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_pi32%> in code");
            else if (fcode == ARM_BUILTIN_WSRADI)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srai_si64 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_si64%> in code");
            else if (fcode == ARM_BUILTIN_WSRLH)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srl_pi16 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WSRLW)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srl_pi32 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_pi32%> in code");
            else if (fcode == ARM_BUILTIN_WSRLD)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_srl_si64 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_si64%> in code");
            else if (fcode == ARM_BUILTIN_WSLLH)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_sll_pi16 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WSLLW)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_sll_pi32 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_pi32%> in code");
            else if (fcode == ARM_BUILTIN_WSLLD)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_sll_si64 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_si64%> in code");
            else if (fcode == ARM_BUILTIN_WSRAH)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_sra_pi16 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_pi16%> in code");
            else if (fcode == ARM_BUILTIN_WSRAW)
-        error ("the count should be no less than 0.  please check the intrinsic _mm_sra_pi32 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_pi32%> in code");
            else
-        error ("the count should be no less than 0.  please check the intrinsic _mm_sra_si64 in code."); +        error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_si64%> in code");
          }
      }
        return arm_expand_binop_builtin (icode, exp, target);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index bb75921f32d..084cbac68ed 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3894,7 +3894,7 @@ arm_options_perform_arch_sanity_checks (void)

    /* __fp16 support currently assumes the core has ldrh.  */
    if (!arm_arch4 && arm_fp16_format != ARM_FP16_FORMAT_NONE)
-    sorry ("__fp16 and no ldrh");
+    sorry ("%<__fp16%> and no ldrh");

    if (use_cmse && !arm_arch_cmse)
      error ("target CPU does not support ARMv8-M Security Extensions");
@@ -6455,7 +6455,7 @@ use_vfp_abi (enum arm_pcs pcs_variant, bool is_double)

        if (TARGET_THUMB1 && !seen_thumb1_vfp)
      {
-      sorry ("Thumb-1 hard-float VFP ABI");
+      sorry ("Thumb-1 %<hard-float%> VFP ABI");
        /* sorry() is not immediately fatal, so only display this once.  */
        seen_thumb1_vfp = true;
      }
@@ -6544,7 +6544,7 @@ aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant,
    *base_mode = new_mode;

    if (TARGET_GENERAL_REGS_ONLY)
-    error ("argument of type %qT not permitted with -mgeneral-regs-only",
+    error ("argument of type %qT not permitted with %<-mgeneral-regs-only%>",
         type);

    return true;
@@ -7488,7 +7488,7 @@ arm_handle_cmse_nonsecure_entry (tree *node, tree name,
      {
        *no_add_attrs = true;
       warning (OPT_Wattributes, "%qE attribute ignored without %<-mcmse%> "
-           "option.", name);
+           "option", name);
        return NULL_TREE;
      }

@@ -7540,7 +7540,7 @@ arm_handle_cmse_nonsecure_call (tree *node, tree name,
      {
        *no_add_attrs = true;
       warning (OPT_Wattributes, "%qE attribute ignored without %<-mcmse%> "
-           "option.", name);
+           "option", name);
        return NULL_TREE;
      }

@@ -34087,7 +34087,7 @@ thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
    for (unsigned i = 0, n = outputs.length (); i < n; ++i)
      if (startswith (constraints[i], "=@cc"))
        {
-    sorry ("asm flags not supported in thumb1 mode");
+    sorry ("%<asm%> flags not supported in thumb1 mode");
      break;
        }
    return NULL;

Reply via email to