Hello,
We've observed that some aarch64 tests can fail if DCE is made more
aggressive as it removes the builtin calls being tested for errors.
This patch simply adds a LHS to these builtin calls to make sure DCE does
not remove them at -O0.
This patch has been tested on aarch64-elf. Ok to commit ?
Thanks,
Marc
2021-12-06 Marc Poulhiès <poulh...@adacore.com>
gcc/testsuite/
* gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c: Add
LHS to builtin calls.
* gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c:
Likewise.
>From 0ce49305d315a482d9cb3baacf2af580d4c46ff7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marc=20Poulhi=C3=A8s?= <poulh...@adacore.com>
Date: Mon, 6 Dec 2021 14:11:00 +0100
Subject: [PATCH] testsuite: Robustify aarch64/simd tests against more
aggressive DCE
This patch simply adds a LHS to some builtin calls to make sure DCE does
not remove them at -O0.
gcc/testsuite/
* gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c: Add
LHS to builtin calls.
* gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c:
Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c:
Likewise.
---
.../gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c | 4 ++--
.../aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c | 4 ++--
.../aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c | 4 ++--
.../aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c | 4 ++--
.../aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c | 4 ++--
.../aarch64/simd/vqdmull_high_laneq_s16_indices_1.c | 4 ++--
.../aarch64/simd/vqdmull_high_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c | 4 ++--
.../gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c | 4 ++--
50 files changed, 100 insertions(+), 100 deletions(-)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c
index dd52b3e7279..af6eca00d6d 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, -1);
+ int32x4_t tmp0 = vqdmlal_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, 4);
+ int32x4_t tmp1 = vqdmlal_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c
index 279e5923464..cd458815490 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlal_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, -1);
+ int64x2_t tmp0 = vqdmlal_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlal_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, 2);
+ int64x2_t tmp1 = vqdmlal_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c
index 6a6e8779e9c..3b612dd03af 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c
@@ -16,7 +16,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlal_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, -1);
+ int32x4_t tmp0 = vqdmlal_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlal_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, 8);
+ int32x4_t tmp1 = vqdmlal_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c
index e3353a3f9a8..2af45ac7cb0 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c
@@ -16,7 +16,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, -1);
+ int64x2_t tmp0 = vqdmlal_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, 4);
+ int64x2_t tmp1 = vqdmlal_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c
index 69bd5f5b236..73ea7a376c7 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_lane_s16 (int32x4_a, int16x4_b, int16x4_c, -1);
+ int32x4_t tmp0 = vqdmlal_lane_s16 (int32x4_a, int16x4_b, int16x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_lane_s16 (int32x4_a, int16x4_b, int16x4_c, 4);
+ int32x4_t tmp1 = vqdmlal_lane_s16 (int32x4_a, int16x4_b, int16x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c
index e8886c56568..6ed5f6f4d3c 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlal_lane_s32 (int64x2_a, int32x2_b, int32x2_c, -1);
+ int64x2_t tmp0 = vqdmlal_lane_s32 (int64x2_a, int32x2_b, int32x2_c, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlal_lane_s32 (int64x2_a, int32x2_b, int32x2_c, 2);
+ int64x2_t tmp1 = vqdmlal_lane_s32 (int64x2_a, int32x2_b, int32x2_c, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c
index f800d360a7a..4ff864e80e2 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlal_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, -1);
+ int32x4_t tmp0 = vqdmlal_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlal_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, 8);
+ int32x4_t tmp1 = vqdmlal_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c
index f72f92a63de..f2fb2967d03 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1);
+ int64x2_t tmp0 = vqdmlal_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlal_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4);
+ int64x2_t tmp1 = vqdmlal_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c
index 34b01f0a606..f7fd02cd579 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int32_t int32_a = 0xdeadbeef;
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlalh_lane_s16 (int32_a, int16_b, int16x4_c, -1);
+ int32_t tmp0 = vqdmlalh_lane_s16 (int32_a, int16_b, int16x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlalh_lane_s16 (int32_a, int16_b, int16x4_c, 4);
+ int32_t tmp1 = vqdmlalh_lane_s16 (int32_a, int16_b, int16x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c
index 43e656a4c5e..207b2061e01 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int32x2_t int32x2_c = vreinterpret_s32_u64 (base_c);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlals_lane_s32 (int64_a, int32_b, int32x2_c, -1);
+ int64_t tmp0 = vqdmlals_lane_s32 (int64_a, int32_b, int32x2_c, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlals_lane_s32 (int64_a, int32_b, int32x2_c, 2);
+ int64_t tmp1 = vqdmlals_lane_s32 (int64_a, int32_b, int32x2_c, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c
index c4c009fbdb3..5ffbdb254f8 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, -1);
+ int32x4_t tmp0 = vqdmlsl_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, 4);
+ int32x4_t tmp1 = vqdmlsl_high_lane_s16 (int32x4_a, int16x8_b, int16x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c
index 1d9d242fd1a..4309949bee6 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlsl_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, -1);
+ int64x2_t tmp0 = vqdmlsl_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlsl_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, 2);
+ int64x2_t tmp1 = vqdmlsl_high_lane_s32 (int64x2_a, int32x4_b, int32x2_c, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c
index d0675f1ce8a..ff8a63ebfa3 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c
@@ -16,7 +16,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlsl_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, -1);
+ int32x4_t tmp0 = vqdmlsl_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlsl_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, 8);
+ int32x4_t tmp1 = vqdmlsl_high_laneq_s16 (int32x4_a, int16x8_b, int16x8_c, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c
index 56383eee1fb..18b4e9776e4 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c
@@ -16,7 +16,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, -1);
+ int64x2_t tmp0 = vqdmlsl_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, 4);
+ int64x2_t tmp1 = vqdmlsl_high_laneq_s32 (int64x2_a, int32x4_b, int32x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c
index 99996804f07..f8e9637d792 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_lane_s16 (int32x4_a, int16x4_b, int16x4_c, -1);
+ int32x4_t tmp0 = vqdmlsl_lane_s16 (int32x4_a, int16x4_b, int16x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_lane_s16 (int32x4_a, int16x4_b, int16x4_c, 4);
+ int32x4_t tmp1 = vqdmlsl_lane_s16 (int32x4_a, int16x4_b, int16x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c
index a4f35ca0fa4..ec8b0946b8e 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlsl_lane_s32 (int64x2_a, int32x2_b, int32x2_c, -1);
+ int64x2_t tmp0 = vqdmlsl_lane_s32 (int64x2_a, int32x2_b, int32x2_c, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlsl_lane_s32 (int64x2_a, int32x2_b, int32x2_c, 2);
+ int64x2_t tmp1 = vqdmlsl_lane_s32 (int64x2_a, int32x2_b, int32x2_c, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c
index 65e9c0094a7..1828649c24d 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlsl_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, -1);
+ int32x4_t tmp0 = vqdmlsl_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmlsl_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, 8);
+ int32x4_t tmp1 = vqdmlsl_laneq_s16 (int32x4_a, int16x4_b, int16x8_c, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c
index 4dc33607e38..9d0b3d5a8e1 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c
@@ -15,7 +15,7 @@ main (int argc, char **argv)
int64x2_t int64x2_a = vreinterpretq_s64_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1);
+ int64x2_t tmp0 = vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4);
+ int64x2_t tmp1 = vqdmlsl_laneq_s32 (int64x2_a, int32x2_b, int32x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c
index f46e5bb201b..d79d82e7823 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int32_t int32_a = 0xdeadbeef;
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlslh_lane_s16 (int32_a, int16_b, int16x4_c, -1);
+ int32_t tmp0 = vqdmlslh_lane_s16 (int32_a, int16_b, int16x4_c, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmlslh_lane_s16 (int32_a, int16_b, int16x4_c, 4);
+ int32_t tmp1 = vqdmlslh_lane_s16 (int32_a, int16_b, int16x4_c, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c
index c8271f4c7c2..89ef2367f33 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c
@@ -11,8 +11,8 @@ main (int argc, char **argv)
int32x2_t int32x2_c = vreinterpret_s32_u64 (base_c);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlsls_lane_s32 (int64_a, int32_b, int32x2_c, -1);
+ int64_t tmp0 = vqdmlsls_lane_s32 (int64_a, int32_b, int32x2_c, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmlsls_lane_s32 (int64_a, int32_b, int32x2_c, 2);
+ int64_t tmp1 = vqdmlsls_lane_s32 (int64_a, int32_b, int32x2_c, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c
index 9bde011bf9a..ba4ba9fddb2 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int16x4_t int16x4_b = vreinterpret_s16_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulh_lane_s16 (int16x4_a, int16x4_b, -1);
+ int16x4_t tmp0 = vqdmulh_lane_s16 (int16x4_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulh_lane_s16 (int16x4_a, int16x4_b, 4);
+ int16x4_t tmp1 = vqdmulh_lane_s16 (int16x4_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c
index bd93566fe05..ec7cfd0c44d 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int32x2_t int32x2_b = vreinterpret_s32_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulh_lane_s32 (int32x2_a, int32x2_b, -1);
+ int32x2_t tmp0 = vqdmulh_lane_s32 (int32x2_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulh_lane_s32 (int32x2_a, int32x2_b, 2);
+ int32x2_t tmp1 = vqdmulh_lane_s32 (int32x2_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c
index ece91e63f07..86bb86a68e3 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c
@@ -13,7 +13,7 @@ main (int argc, char **argv)
int16x8_t int16x8_b = vreinterpretq_s16_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmulh_laneq_s16 (int16x4_a, int16x8_b, -1);
+ int16x4_t tmp0 = vqdmulh_laneq_s16 (int16x4_a, int16x8_b, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmulh_laneq_s16 (int16x4_a, int16x8_b, 8);
+ int16x4_t tmp1 = vqdmulh_laneq_s16 (int16x4_a, int16x8_b, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c
index dd5afb32abf..0c537189f86 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c
@@ -13,7 +13,7 @@ main (int argc, char **argv)
int32x4_t int32x4_b = vreinterpretq_s32_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulh_laneq_s32 (int32x2_a, int32x4_b, -1);
+ int32x2_t tmp0 = vqdmulh_laneq_s32 (int32x2_a, int32x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulh_laneq_s32 (int32x2_a, int32x4_b, 4);
+ int32x2_t tmp1 = vqdmulh_laneq_s32 (int32x2_a, int32x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c
index 8804e840267..a876d9e51fd 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c
@@ -10,7 +10,7 @@ main (int argc, char **argv)
int16x4_t int16x4_b = vreinterpret_s16_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulhh_lane_s16 (int16_a, int16x4_b, -1);
+ int16_t tmp0 = vqdmulhh_lane_s16 (int16_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulhh_lane_s16 (int16_a, int16x4_b, 4);
+ int16_t tmp1 = vqdmulhh_lane_s16 (int16_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c
index 0b19ea9b17c..d7a2a6ebb35 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c
@@ -12,7 +12,7 @@ main (int argc, char **argv)
int16x8_t int16x8_a = vreinterpretq_s16_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulhq_lane_s16 (int16x8_a, int16x4_b, -1);
+ int16x8_t tmp0 = vqdmulhq_lane_s16 (int16x8_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulhq_lane_s16 (int16x8_a, int16x4_b, 4);
+ int16x8_t tmp1 = vqdmulhq_lane_s16 (int16x8_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c
index f2d3228a801..6e28e711e05 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c
@@ -12,7 +12,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulhq_lane_s32 (int32x4_a, int32x2_b, -1);
+ int32x4_t tmp0 = vqdmulhq_lane_s32 (int32x4_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulhq_lane_s32 (int32x4_a, int32x2_b, 2);
+ int32x4_t tmp1 = vqdmulhq_lane_s32 (int32x4_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c
index 20f52842232..3decd576f3e 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int16x8_t int16x8_b = vreinterpretq_s16_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmulhq_laneq_s16 (int16x8_a, int16x8_b, -1);
+ int16x8_t tmp0 = vqdmulhq_laneq_s16 (int16x8_a, int16x8_b, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmulhq_laneq_s16 (int16x8_a, int16x8_b, 8);
+ int16x8_t tmp1 = vqdmulhq_laneq_s16 (int16x8_a, int16x8_b, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c
index 916efbb7cdf..a68d1a615a6 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int32x4_t int32x4_b = vreinterpretq_s32_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulhq_laneq_s32 (int32x4_a, int32x4_b, -1);
+ int32x4_t tmp0 = vqdmulhq_laneq_s32 (int32x4_a, int32x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmulhq_laneq_s32 (int32x4_a, int32x4_b, 4);
+ int32x4_t tmp1 = vqdmulhq_laneq_s32 (int32x4_a, int32x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c
index 8bcfb33e690..00e3769b804 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c
@@ -10,7 +10,7 @@ main (int argc, char **argv)
int32x2_t int32x2_b = vreinterpret_s32_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulhs_lane_s32 (int32_a, int32x2_b, -1);
+ int32_t tmp0 = vqdmulhs_lane_s32 (int32_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulhs_lane_s32 (int32_a, int32x2_b, 2);
+ int32_t tmp1 = vqdmulhs_lane_s32 (int32_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c
index e21ca9c2a7e..1286b230a1a 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c
@@ -12,7 +12,7 @@ main (int argc, char **argv)
int16x8_t int16x8_a = vreinterpretq_s16_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_high_lane_s16 (int16x8_a, int16x4_b, -1);
+ int32x4_t tmp0 = vqdmull_high_lane_s16 (int16x8_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_high_lane_s16 (int16x8_a, int16x4_b, 4);
+ int32x4_t tmp1 = vqdmull_high_lane_s16 (int16x8_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c
index 1df33b2fb0c..bb0fd1d8348 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c
@@ -12,7 +12,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmull_high_lane_s32 (int32x4_a, int32x2_b, -1);
+ int64x2_t tmp0 = vqdmull_high_lane_s32 (int32x4_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmull_high_lane_s32 (int32x4_a, int32x2_b, 2);
+ int64x2_t tmp1 = vqdmull_high_lane_s32 (int32x4_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c
index df81cb38c5e..d6142055593 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int16x8_t int16x8_b = vreinterpretq_s16_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmull_high_laneq_s16 (int16x8_a, int16x8_b, -1);
+ int32x4_t tmp0 = vqdmull_high_laneq_s16 (int16x8_a, int16x8_b, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmull_high_laneq_s16 (int16x8_a, int16x8_b, 8);
+ int32x4_t tmp1 = vqdmull_high_laneq_s16 (int16x8_a, int16x8_b, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c
index a67da624a22..9101c4fb68a 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int32x4_t int32x4_b = vreinterpretq_s32_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_high_laneq_s32 (int32x4_a, int32x4_b, -1);
+ int64x2_t tmp0 = vqdmull_high_laneq_s32 (int32x4_a, int32x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_high_laneq_s32 (int32x4_a, int32x4_b, 4);
+ int64x2_t tmp1 = vqdmull_high_laneq_s32 (int32x4_a, int32x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c
index 938279caf49..684befa8906 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int16x4_t int16x4_b = vreinterpret_s16_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_lane_s16 (int16x4_a, int16x4_b, -1);
+ int32x4_t tmp0 = vqdmull_lane_s16 (int16x4_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_lane_s16 (int16x4_a, int16x4_b, 4);
+ int32x4_t tmp1 = vqdmull_lane_s16 (int16x4_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c
index b922c658780..63802d9efd2 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int32x2_t int32x2_b = vreinterpret_s32_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmull_lane_s32 (int32x2_a, int32x2_b, -1);
+ int64x2_t tmp0 = vqdmull_lane_s32 (int32x2_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmull_lane_s32 (int32x2_a, int32x2_b, 2);
+ int64x2_t tmp1 = vqdmull_lane_s32 (int32x2_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c
index e38cbc85cba..c97f7c3f8d7 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c
@@ -13,7 +13,7 @@ main (int argc, char **argv)
int16x8_t int16x8_b = vreinterpretq_s16_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmull_laneq_s16 (int16x4_a, int16x8_b, -1);
+ int32x4_t tmp0 = vqdmull_laneq_s16 (int16x4_a, int16x8_b, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqdmull_laneq_s16 (int16x4_a, int16x8_b, 8);
+ int32x4_t tmp1 = vqdmull_laneq_s16 (int16x4_a, int16x8_b, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c
index f90fbe6a328..3117f44e01a 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c
@@ -13,7 +13,7 @@ main (int argc, char **argv)
int32x4_t int32x4_b = vreinterpretq_s32_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_laneq_s32 (int32x2_a, int32x4_b, -1);
+ int64x2_t tmp0 = vqdmull_laneq_s32 (int32x2_a, int32x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmull_laneq_s32 (int32x2_a, int32x4_b, 4);
+ int64x2_t tmp1 = vqdmull_laneq_s32 (int32x2_a, int32x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c
index fc532845257..b25a95d9424 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c
@@ -10,7 +10,7 @@ main (int argc, char **argv)
int16x4_t int16x4_b = vreinterpret_s16_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmullh_lane_s16 (int16_a, int16x4_b, -1);
+ int16_t tmp0 = vqdmullh_lane_s16 (int16_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqdmullh_lane_s16 (int16_a, int16x4_b, 4);
+ int16_t tmp1 = vqdmullh_lane_s16 (int16_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c
index edc66b52b3f..7d8ebdd8a20 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c
@@ -10,7 +10,7 @@ main (int argc, char **argv)
int32x2_t int32x2_b = vreinterpret_s32_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulls_lane_s32 (int32_a, int32x2_b, -1);
+ int32_t tmp0 = vqdmulls_lane_s32 (int32_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqdmulls_lane_s32 (int32_a, int32x2_b, 2);
+ int32_t tmp1 = vqdmulls_lane_s32 (int32_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c
index 1ce5c4b878e..75fc2afa10e 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int16x4_t int16x4_b = vreinterpret_s16_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulh_lane_s16 (int16x4_a, int16x4_b, -1);
+ int16x4_t tmp0 = vqrdmulh_lane_s16 (int16x4_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulh_lane_s16 (int16x4_a, int16x4_b, 4);
+ int16x4_t tmp1 = vqrdmulh_lane_s16 (int16x4_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c
index b16f1b8be5a..282c31e348a 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c
@@ -11,7 +11,7 @@ main (int argc, char **argv)
int32x2_t int32x2_b = vreinterpret_s32_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqrdmulh_lane_s32 (int32x2_a, int32x2_b, -1);
+ int32x2_t tmp0 = vqrdmulh_lane_s32 (int32x2_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqrdmulh_lane_s32 (int32x2_a, int32x2_b, 2);
+ int32x2_t tmp1 = vqrdmulh_lane_s32 (int32x2_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c
index 19cad843ce6..9ebd7276053 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c
@@ -13,7 +13,7 @@ main (int argc, char **argv)
int16x8_t int16x8_b = vreinterpretq_s16_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqrdmulh_laneq_s16 (int16x4_a, int16x8_b, -1);
+ int16x4_t tmp0 = vqrdmulh_laneq_s16 (int16x4_a, int16x8_b, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqrdmulh_laneq_s16 (int16x4_a, int16x8_b, 8);
+ int16x4_t tmp1 = vqrdmulh_laneq_s16 (int16x4_a, int16x8_b, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c
index af20661741d..cd37def9c1e 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c
@@ -13,7 +13,7 @@ main (int argc, char **argv)
int32x4_t int32x4_b = vreinterpretq_s32_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulh_laneq_s32 (int32x2_a, int32x4_b, -1);
+ int32x2_t tmp0 = vqrdmulh_laneq_s32 (int32x2_a, int32x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulh_laneq_s32 (int32x2_a, int32x4_b, 4);
+ int32x2_t tmp1 = vqrdmulh_laneq_s32 (int32x2_a, int32x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c
index a15d39e85fc..ef058c16882 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c
@@ -10,7 +10,7 @@ main (int argc, char **argv)
int16x4_t int16x4_b = vreinterpret_s16_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulhh_lane_s16 (int16_a, int16x4_b, -1);
+ int16_t tmp0 = vqrdmulhh_lane_s16 (int16_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulhh_lane_s16 (int16_a, int16x4_b, 4);
+ int16_t tmp1 = vqrdmulhh_lane_s16 (int16_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c
index 3b0c41ea418..29dd1a969c0 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c
@@ -12,7 +12,7 @@ main (int argc, char **argv)
int16x8_t int16x8_a = vreinterpretq_s16_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulhq_lane_s16 (int16x8_a, int16x4_b, -1);
+ int16x8_t tmp0 = vqrdmulhq_lane_s16 (int16x8_a, int16x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulhq_lane_s16 (int16x8_a, int16x4_b, 4);
+ int16x8_t tmp1 = vqrdmulhq_lane_s16 (int16x8_a, int16x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c
index 9a91c37d5ac..0cefa702208 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c
@@ -12,7 +12,7 @@ main (int argc, char **argv)
int32x4_t int32x4_a = vreinterpretq_s32_u64 (baseq_a);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqrdmulhq_lane_s32 (int32x4_a, int32x2_b, -1);
+ int32x4_t tmp0 = vqrdmulhq_lane_s32 (int32x4_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqrdmulhq_lane_s32 (int32x4_a, int32x2_b, 2);
+ int32x4_t tmp1 = vqrdmulhq_lane_s32 (int32x4_a, int32x2_b, 2);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c
index 038d796e33a..0bed73012ec 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int16x8_t int16x8_b = vreinterpretq_s16_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqrdmulhq_laneq_s16 (int16x8_a, int16x8_b, -1);
+ int16x8_t tmp0 = vqrdmulhq_laneq_s16 (int16x8_a, int16x8_b, -1);
/* { dg-error "lane 8 out of range 0 - 7" "" {target *-*-*} 0 } */
- vqrdmulhq_laneq_s16 (int16x8_a, int16x8_b, 8);
+ int16x8_t tmp1 = vqrdmulhq_laneq_s16 (int16x8_a, int16x8_b, 8);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c
index b46b92ad54f..0625a2340d0 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c
@@ -14,7 +14,7 @@ main (int argc, char **argv)
int32x4_t int32x4_b = vreinterpretq_s32_u64 (baseq_b);
/* { dg-error "lane -1 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulhq_laneq_s32 (int32x4_a, int32x4_b, -1);
+ int32x4_t tmp0 = vqrdmulhq_laneq_s32 (int32x4_a, int32x4_b, -1);
/* { dg-error "lane 4 out of range 0 - 3" "" {target *-*-*} 0 } */
- vqrdmulhq_laneq_s32 (int32x4_a, int32x4_b, 4);
+ int32x4_t tmp1 = vqrdmulhq_laneq_s32 (int32x4_a, int32x4_b, 4);
}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c
index 48223cb8911..f957b544a00 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c
@@ -10,7 +10,7 @@ main (int argc, char **argv)
int32x2_t int32x2_b = vreinterpret_s32_u64 (base_b);
/* { dg-error "lane -1 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqrdmulhs_lane_s32 (int32_a, int32x2_b, -1);
+ int32_t tmp0 = vqrdmulhs_lane_s32 (int32_a, int32x2_b, -1);
/* { dg-error "lane 2 out of range 0 - 1" "" {target *-*-*} 0 } */
- vqrdmulhs_lane_s32 (int32_a, int32x2_b, 2);
+ int32_t tmp1 = vqrdmulhs_lane_s32 (int32_a, int32x2_b, 2);
}
--
2.25.1
