Hi,
This patch switches Pmode to SImode for x32. It uses proper patterns
for x32. OK for trunk?
Thanks.
H.J.
---
2012-03-02 H.J. Lu <hongjiu...@intel.com>
* config/i386/i386.c (ix86_option_override_internal): Properly
set ix86_gen_leave and ix86_gen_monitor. Check Pmode == DImode.
(legitimize_tls_address): For x32, call gen_tls_global_dynamic_x32
and gen_tls_local_dynamic_base_x32.
* config/i386/i386.h (Pmode): Check TARGET_LP64 instead of
TARGET_64BIT.
* config/i386/i386.md (PTR): Removed.
(x86_64_mode): New.
(*tls_global_dynamic_64): Renamed to ...
(*tls_global_dynamic_<x86_64_mode>): This.
(tls_global_dynamic_64): Renamed to ...
(tls_global_dynamic_<x86_64_mode>): This.
(*tls_local_dynamic_base_64): Renamed to ...
(*tls_local_dynamic_base_<x86_64_mode>): This.
(tls_local_dynamic_base_64): Renamed to ...
(tls_local_dynamic_base_<x86_64_mode>): This.
(stack_protect_set_<mode>): Replace ":PTR" with ":P".
(stack_tls_protect_set_<mode>): Likewise.
(stack_tls_protect_test_<mode>): Likewise.
* config/i386/sse.md (sse3_monitor64): Renamed to ...
(sse3_monitor_<x86_64_mode>): This.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 191c8b5..3979167 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3748,11 +3748,23 @@ ix86_option_override_internal (bool main_args_p)
if (TARGET_64BIT)
{
ix86_gen_leave = gen_leave_rex64;
+ if (TARGET_X32)
+ ix86_gen_monitor = gen_sse3_monitor_x32;
+ else
+ ix86_gen_monitor = gen_sse3_monitor_64;
+ }
+ else
+ {
+ ix86_gen_leave = gen_leave;
+ ix86_gen_monitor = gen_sse3_monitor;
+ }
+
+ if (Pmode == DImode)
+ {
ix86_gen_add3 = gen_adddi3;
ix86_gen_sub3 = gen_subdi3;
ix86_gen_sub3_carry = gen_subdi3_carry;
ix86_gen_one_cmpl2 = gen_one_cmpldi2;
- ix86_gen_monitor = gen_sse3_monitor64;
ix86_gen_andsp = gen_anddi3;
ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di;
ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi;
@@ -3760,12 +3772,10 @@ ix86_option_override_internal (bool main_args_p)
}
else
{
- ix86_gen_leave = gen_leave;
ix86_gen_add3 = gen_addsi3;
ix86_gen_sub3 = gen_subsi3;
ix86_gen_sub3_carry = gen_subsi3_carry;
ix86_gen_one_cmpl2 = gen_one_cmplsi2;
- ix86_gen_monitor = gen_sse3_monitor;
ix86_gen_andsp = gen_andsi3;
ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si;
ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi;
@@ -12533,7 +12543,12 @@ legitimize_tls_address (rtx x, enum tls_model model,
bool for_mov)
rtx rax = gen_rtx_REG (Pmode, AX_REG), insns;
start_sequence ();
- emit_call_insn (gen_tls_global_dynamic_64 (rax, x, caddr));
+ if (TARGET_X32)
+ emit_call_insn (gen_tls_global_dynamic_x32 (rax, x,
+ caddr));
+ else
+ emit_call_insn (gen_tls_global_dynamic_64 (rax, x,
+ caddr));
insns = get_insns ();
end_sequence ();
@@ -12581,7 +12596,12 @@ legitimize_tls_address (rtx x, enum tls_model model,
bool for_mov)
rtx rax = gen_rtx_REG (Pmode, AX_REG), insns, eqv;
start_sequence ();
- emit_call_insn (gen_tls_local_dynamic_base_64 (rax, caddr));
+ if (TARGET_X32)
+ emit_call_insn (gen_tls_local_dynamic_base_x32 (rax,
+ caddr));
+ else
+ emit_call_insn (gen_tls_local_dynamic_base_64 (rax,
+ caddr));
insns = get_insns ();
end_sequence ();
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 7721c46..4c6e5fd 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1744,7 +1744,7 @@ do {
\
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
-#define Pmode (TARGET_64BIT ? DImode : SImode)
+#define Pmode (TARGET_LP64 ? DImode : SImode)
/* A C expression whose value is zero if pointers that need to be extended
from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 35b2673..1595491 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -897,10 +897,8 @@
(define_mode_iterator W
[(SI "word_mode == SImode") (DI "word_mode == DImode")])
-;; This mode iterator allows :PTR to be used for patterns that operate on
-;; ptr_mode sized quantities.
-(define_mode_iterator PTR
- [(SI "ptr_mode == SImode") (DI "ptr_mode == DImode")])
+;; Used in x84_64 pattern name to mark x32.
+(define_mode_attr x86_64_mode [(SI "x32") (DI "64")])
;; Scheduling descriptions
@@ -12594,13 +12592,13 @@
(clobber (match_scratch:SI 5 ""))
(clobber (reg:CC FLAGS_REG))])])
-(define_insn "*tls_global_dynamic_64"
- [(set (match_operand:DI 0 "register_operand" "=a")
- (call:DI
- (mem:QI (match_operand:DI 2 "constant_call_address_operand" "z"))
- (match_operand:DI 3 "" "")))
- (unspec:DI [(match_operand 1 "tls_symbolic_operand" "")]
- UNSPEC_TLS_GD)]
+(define_insn "*tls_global_dynamic_<x86_64_mode>"
+ [(set (match_operand:P 0 "register_operand" "=a")
+ (call:P
+ (mem:QI (match_operand:P 2 "constant_call_address_operand" "z"))
+ (match_operand:P 3 "" "")))
+ (unspec:P [(match_operand:P 1 "tls_symbolic_operand" "")]
+ UNSPEC_TLS_GD)]
"TARGET_64BIT"
{
if (!TARGET_X32)
@@ -12617,14 +12615,15 @@
(set (attr "length")
(symbol_ref "TARGET_X32 ? 15 : 16"))])
-(define_expand "tls_global_dynamic_64"
+(define_expand "tls_global_dynamic_<x86_64_mode>"
[(parallel
- [(set (match_operand:DI 0 "register_operand" "")
- (call:DI
- (mem:QI (match_operand:DI 2 "constant_call_address_operand" ""))
+ [(set (match_operand:P 0 "register_operand" "")
+ (call:P
+ (mem:QI (match_operand:P 2 "constant_call_address_operand" ""))
(const_int 0)))
- (unspec:DI [(match_operand 1 "tls_symbolic_operand" "")]
- UNSPEC_TLS_GD)])])
+ (unspec:P [(match_operand:P 1 "tls_symbolic_operand" "")]
+ UNSPEC_TLS_GD)])]
+ "TARGET_64BIT")
(define_insn "*tls_local_dynamic_base_32_gnu"
[(set (match_operand:SI 0 "register_operand" "=a")
@@ -12661,12 +12660,12 @@
(clobber (match_scratch:SI 4 ""))
(clobber (reg:CC FLAGS_REG))])])
-(define_insn "*tls_local_dynamic_base_64"
- [(set (match_operand:DI 0 "register_operand" "=a")
- (call:DI
- (mem:QI (match_operand:DI 1 "constant_call_address_operand" "z"))
- (match_operand:DI 2 "" "")))
- (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)]
+(define_insn "*tls_local_dynamic_base_<x86_64_mode>"
+ [(set (match_operand:P 0 "register_operand" "=a")
+ (call:P
+ (mem:QI (match_operand:P 1 "constant_call_address_operand" "z"))
+ (match_operand:P 2 "" "")))
+ (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)]
"TARGET_64BIT"
{
output_asm_insn
@@ -12678,13 +12677,14 @@
[(set_attr "type" "multi")
(set_attr "length" "12")])
-(define_expand "tls_local_dynamic_base_64"
+(define_expand "tls_local_dynamic_base_<x86_64_mode>"
[(parallel
- [(set (match_operand:DI 0 "register_operand" "")
- (call:DI
- (mem:QI (match_operand:DI 1 "constant_call_address_operand" ""))
+ [(set (match_operand:P 0 "register_operand" "")
+ (call:P
+ (mem:QI (match_operand:P 1 "constant_call_address_operand" ""))
(const_int 0)))
- (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)])])
+ (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)])]
+ "TARGET_64BIT")
;; Local dynamic of a single variable is a lose. Show combine how
;; to convert that back to global dynamic.
@@ -17784,20 +17784,20 @@
})
(define_insn "stack_protect_set_<mode>"
- [(set (match_operand:PTR 0 "memory_operand" "=m")
- (unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")]
- UNSPEC_SP_SET))
- (set (match_scratch:PTR 2 "=&r") (const_int 0))
+ [(set (match_operand:P 0 "memory_operand" "=m")
+ (unspec:P [(match_operand:P 1 "memory_operand" "m")]
+ UNSPEC_SP_SET))
+ (set (match_scratch:P 2 "=&r") (const_int 0))
(clobber (reg:CC FLAGS_REG))]
""
"mov{<imodesuffix>}\t{%1, %2|%2, %1}\;mov{<imodesuffix>}\t{%2, %0|%0,
%2}\;xor{l}\t%k2, %k2"
[(set_attr "type" "multi")])
(define_insn "stack_tls_protect_set_<mode>"
- [(set (match_operand:PTR 0 "memory_operand" "=m")
- (unspec:PTR [(match_operand:PTR 1 "const_int_operand" "i")]
- UNSPEC_SP_TLS_SET))
- (set (match_scratch:PTR 2 "=&r") (const_int 0))
+ [(set (match_operand:P 0 "memory_operand" "=m")
+ (unspec:P [(match_operand:P 1 "const_int_operand" "i")]
+ UNSPEC_SP_TLS_SET))
+ (set (match_scratch:P 2 "=&r") (const_int 0))
(clobber (reg:CC FLAGS_REG))]
""
"mov{<imodesuffix>}\t{%@:%P1, %2|%2, <iptrsize> PTR
%@:%P1}\;mov{<imodesuffix>}\t{%2, %0|%0, %2}\;xor{l}\t%k2, %k2"
@@ -17833,20 +17833,20 @@
(define_insn "stack_protect_test_<mode>"
[(set (match_operand:CCZ 0 "flags_reg_operand" "")
- (unspec:CCZ [(match_operand:PTR 1 "memory_operand" "m")
- (match_operand:PTR 2 "memory_operand" "m")]
+ (unspec:CCZ [(match_operand:P 1 "memory_operand" "m")
+ (match_operand:P 2 "memory_operand" "m")]
UNSPEC_SP_TEST))
- (clobber (match_scratch:PTR 3 "=&r"))]
+ (clobber (match_scratch:P 3 "=&r"))]
""
"mov{<imodesuffix>}\t{%1, %3|%3, %1}\;xor{<imodesuffix>}\t{%2, %3|%3, %2}"
[(set_attr "type" "multi")])
(define_insn "stack_tls_protect_test_<mode>"
[(set (match_operand:CCZ 0 "flags_reg_operand" "")
- (unspec:CCZ [(match_operand:PTR 1 "memory_operand" "m")
- (match_operand:PTR 2 "const_int_operand" "i")]
+ (unspec:CCZ [(match_operand:P 1 "memory_operand" "m")
+ (match_operand:P 2 "const_int_operand" "i")]
UNSPEC_SP_TLS_TEST))
- (clobber (match_scratch:PTR 3 "=r"))]
+ (clobber (match_scratch:P 3 "=r"))]
""
"mov{<imodesuffix>}\t{%1, %3|%3, %1}\;xor{<imodesuffix>}\t{%@:%P2, %3|%3,
<iptrsize> PTR %@:%P2}"
[(set_attr "type" "multi")])
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 4afc4b3..7b3f0b1 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -8147,8 +8147,8 @@
"monitor\t%0, %1, %2"
[(set_attr "length" "3")])
-(define_insn "sse3_monitor64"
- [(unspec_volatile [(match_operand:DI 0 "register_operand" "a")
+(define_insn "sse3_monitor_<x86_64_mode>"
+ [(unspec_volatile [(match_operand:P 0 "register_operand" "a")
(match_operand:SI 1 "register_operand" "c")
(match_operand:SI 2 "register_operand" "d")]
UNSPECV_MONITOR)]
--
1.7.6.5
