This patch documents some more of the changes that have occurred on ARM
this year. I've also re-worded a couple of the existing changes
recorded there to try and improve the clarity to users.
OK?
Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v
retrieving revision 1.94
diff -u -p -r1.94 changes.html
--- changes.html 2 Mar 2012 09:53:07 -0000 1.94
+++ changes.html 2 Mar 2012 12:16:39 -0000
@@ -618,15 +618,32 @@ well.</p></li>
<h3 id="arm">ARM</h3>
<ul>
- <li>GCC now supports the Cortex-A7 processor implementing the
- v7-a version of the architecture using the option
+ <li>GCC now supports the Cortex-A7 processor, implementing the
+ ARMv7-A version of the architecture, using the option
<code>-mcpu=cortex-a7</code>.</li>
- <li>The default vector size in auto-vectorization for NEON is now 128 bits.
- If vectorization fails thusly, the vectorizer tries again with
- 64-bit vectors.</li>
+ <li> GCC now supports the Cortex-R5 processor, implementing the
+ ARMv7-R version of the architecture, using the option
+ <code>-mcpu=cortex-r5</code>.</li>
+ <li>GCC can now automatically detect the host
+ processor during native compilation. The options
+ <code>-mcpu=</code>, <code>-mtune=</code> and
+ <code>-march=</code> now all accept <code>native</code> in place of
+ the architecture or processor name.</li>
+ <li>The default vector size in auto-vectorization for NEON is now
+ 128 bits. If vectorization with 128-bit vectors fails, the vectorizer
+ will try again with 64-bit vectors.</li>
<li>A new option <code>-mvectorize-with-neon-double</code> was added to
- allow users to change the vector size to 64 bits.</li>
-
+ restrict auto-vectorization to using 64-bit vectors.</li>
+ <li>A number of improvements have been made around code generation for
+ the strided loads and stores for the Neon Advanced SIMD extension.
+ The auto-vectorizer and the backend now fully support the strided load
+ and store instructions (for example vld3 and vld4).</li>
+ <li>Code generation for the Cortex-A15 processor has been improved.</li>
+ <li> 64-bit sync primitives are now supported on ARM.
+ Note that code generated for cores implementing architectures prior
+ to ARMv7 will normally need support from kernel helper functions;
+ on Linux, kernel versions 3.1 and later provide the required
+ support.</li>
</ul>
<h3 id="avr">AVR</h3>
