Philipp Tomsich <philipp.toms...@vrull.eu> writes:
> Richard,
>
> On Wed, 3 Nov 2021 at 10:08, Richard Sandiford
> <richard.sandif...@arm.com> wrote:
>>
>> Philipp Tomsich <philipp.toms...@vrull.eu> writes:
>> > This adds support and a basic tuning model for the Ampere Computing
>> > "Ampere-1" CPU.
>> >
>> > The Ampere-1 implements the ARMv8.6 architecture in A64 mode and is
>> > modelled as a 4-wide issue (as with all modern micro-architectures,
>> > the chosen issue rate is a compromise between the maximum dispatch
>> > rate and the maximum rate of uops issued to the scheduler).
>> >
>> > This adds the -mcpu=ampere1 command-line option and the relevant cost
>> > information/tuning tables for the Ampere-1.
>> >
>> > gcc/ChangeLog:
>> >
>> >       * config/aarch64/aarch64-cores.def (AARCH64_CORE): New Ampere-1
>> >       core.
>> >       * config/aarch64/aarch64-tune.md: Regenerate.
>> >       * config/aarch64/aarch64-cost-tables.h: Add extra costs for
>> >       Ampere-1.
>> >       * config/aarch64/aarch64.c: Add tuning structures for Ampere-1.
>>
>> OK, thanks.
>
> Would this be eligible for a backport to gcc-11 as well to ensure
> commandline-compatibility?

Yeah, that's fine.  I think patches like this are OK to backport to
all open release branches (although they'll need adjustment for GCC 10
and GCC 9, due to differences in the cost structures).

Thanks,
Richard

Reply via email to