On Tue, Nov 2, 2021 at 9:41 AM Jakub Jelinek <ja...@redhat.com> wrote:
>
> Hi!
>
> As discussed in the PR, TImode isn't supported for -m32 on x86 (for the same
> reason as on most 32-bit targets, no support for > 2 * BITS_PER_WORD
> precision integers), but since PR32280 V1TImode is allowed with -msse in SSE
> regs, V2TImode with -mavx or V4TImode with -mavx512f.
> typedef __int128 V __attribute__((vector_size ({16,32,64}));
> will not work, neither typedef int I __attribute__((mode(TI)));
> but mode(V1TI), mode(V2TI) etc. are accepted with a warning when those
> ISAs are enabled. But they are certainly not fully supported, for some
> optabs maybe, but most of them will not. And, veclower lowering those ops
> to TImode scalar operations will not work either because TImode isn't
> supported.
>
> So, this patch keeps V1TImode etc. in VALID*_MODE macros so that we can use
> it in certain instructions, but disallows it in
> targetm.vector_mode_supported_p, so that we don't offer those modes to the
> user as supported.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2021-11-02 Jakub Jelinek <ja...@redhat.com>
>
> PR target/103020
> * config/i386/i386.c (ix86_vector_mode_supported_p): Reject vector
> modes with TImode inner mode if 32-bit.
>
> * gcc.target/i386/pr103020.c: New test.
OK.
Thanks,
Uros.
>
> --- gcc/config/i386/i386.c.jj 2021-10-28 11:29:01.827722053 +0200
> +++ gcc/config/i386/i386.c 2021-11-01 11:01:44.123587169 +0100
> @@ -21989,6 +21989,10 @@ ix86_libgcc_floating_mode_supported_p (s
> static bool
> ix86_vector_mode_supported_p (machine_mode mode)
> {
> + /* For ia32, scalar TImode isn't supported and so V1TImode shouldn't be
> + either. */
> + if (!TARGET_64BIT && GET_MODE_INNER (mode) == TImode)
> + return false;
> if (TARGET_SSE && VALID_SSE_REG_MODE (mode))
> return true;
> if (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
> --- gcc/testsuite/gcc.target/i386/pr103020.c.jj 2021-11-01 11:03:34.498017247
> +0100
> +++ gcc/testsuite/gcc.target/i386/pr103020.c 2021-11-01 11:11:10.794527161
> +0100
> @@ -0,0 +1,11 @@
> +/* PR target/103020 */
> +/* { dg-do compile { target { ! int128 } } } */
> +/* { dg-additional-options "-mavx512f" } */
> +
> +typedef int TI __attribute__((mode (TI))); /* { dg-error "unable to
> emulate" } */
> +typedef int V1TI __attribute__((mode (V1TI))); /* { dg-error "unable to
> emulate" } */
> +typedef int V2TI __attribute__((mode (V2TI))); /* { dg-error "unable to
> emulate" } */
> +typedef int V4TI __attribute__((mode (V4TI))); /* { dg-error "unable to
> emulate" } */
> +/* { dg-warning "is deprecated" "V1TI" { target *-*-* } .-3 } */
> +/* { dg-warning "is deprecated" "V2TI" { target *-*-* } .-3 } */
> +/* { dg-warning "is deprecated" "V4TI" { target *-*-* } .-3 } */
>
> Jakub
>
