+
@item vect_slp_v8qi_store
Target supports vectorization of 8-byte char stores with 8-byte aligned
address at plain @option{-O2}.
@@ -1874,6 +1882,10 @@ address at plain @option{-O2}.
Target supports vectorization of 8-byte int stores with 8-byte aligned
address at plain @option{-O2}.
+@item vect_slp_v2si_store_2
+Target supports vectorization of 8-byte int stores with 8-byte aligned
+address at plain @option{-O2}.
+
@item vect_slp_v4si_store
Target supports vectorization of 16-byte int stores with 16-byte aligned
address at plain @option{-O2}.
diff --git a/gcc/testsuite/gcc.dg/Warray-bounds-48.c
b/gcc/testsuite/gcc.dg/Warray-bounds-48.c
index 19b7634c063..32c0df843d2 100644
--- a/gcc/testsuite/gcc.dg/Warray-bounds-48.c
+++ b/gcc/testsuite/gcc.dg/Warray-bounds-48.c
@@ -30,7 +30,7 @@ static void nowarn_ax_extern (struct AX *p)
static void warn_ax_local_buf (struct AX *p)
{
- p->ax[0] = 4; p->ax[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" {
target { vect_slp_v2hi_store && { ! vect_slp_v4hi_store } } } }
+ p->ax[0] = 4; p->ax[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" {
target { vect_slp_v2hi_store_2 && { ! vect_slp_v4hi_store } } } }
p->ax[2] = 6; // { dg-warning "\\\[-Warray-bounds" }
p->ax[3] = 7; // { dg-warning "\\\[-Warray-bounds" }
@@ -130,7 +130,7 @@ static void warn_a0_extern (struct A0 *p)
static void warn_a0_local_buf (struct A0 *p)
{
- p->a0[0] = 4; p->a0[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" {
target { vect_slp_v2hi_store && { ! vect_slp_v4hi_store } } } }
+ p->a0[0] = 4; p->a0[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" {
target { vect_slp_v2hi_store_2 && { ! vect_slp_v4hi_store } } } }
p->a0[2] = 6; // { dg-warning "\\\[-Warray-bounds" }
p->a0[3] = 7; // { dg-warning "\\\[-Warray-bounds" }
diff --git a/gcc/testsuite/gcc.dg/Warray-parameter-3.c
b/gcc/testsuite/gcc.dg/Warray-parameter-3.c
index b6ed8daf51c..bbf55a40a3c 100644
--- a/gcc/testsuite/gcc.dg/Warray-parameter-3.c
+++ b/gcc/testsuite/gcc.dg/Warray-parameter-3.c
@@ -77,7 +77,7 @@ gia3 (int a[3])
__attribute__ ((noipa)) void
gcas3 (char a[static 3])
{
- a[0] = 0; a[1] = 1; a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow"
"pr102706" { target { vect_slp_v4qi_store } } }
+ a[0] = 0; a[1] = 1; a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow"
"pr102706" { target { vect_slp_v4qi_store_2 } } }
a[3] = 3; // { dg-warning "\\\[-Warray-bounds" }
}
diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c
index 04e91afb8bc..488b4a9b0c7 100644
--- a/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c
+++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c
@@ -65,8 +65,8 @@ void warn_comp_lit (void)
// MEM <vector(8) char> [(char *)&a7] = { 0, 1, 2, 3, 4, 5, 6, 7 };
// MEM <vector(16) char> [(char *)&a15] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14, 15 };
// and warning should be expected, refer to PR102722.
- *(AC4*)a2 = Ac4; // { dg-warning "writing 4 bytes into a region of size 2"
"pr101475" { xfail { ! { vect_slp_v4qi_store } } } }
- *(AC4*)a3 = Ac4; // { dg-warning "writing 4 bytes into a region of size 3"
"pr101475" { xfail { ! { vect_slp_v4qi_store } } } }
+ *(AC4*)a2 = Ac4; // { dg-warning "writing 4 bytes into a region of size 2"
"pr101475" { xfail { ! { vect_slp_v4qi_store_3 } } } }
+ *(AC4*)a3 = Ac4; // { dg-warning "writing 4 bytes into a region of size 3"
"pr101475" { xfail { ! { vect_slp_v4qi_store_3 } } } }
*(AC8*)a4 = Ac8; // { dg-warning "writing 8 bytes into a region of size 4"
"pr101475" { xfail { ! { vect_slp_v8qi_store } } } }
*(AC8*)a7 = Ac8; // { dg-warning "writing 8 bytes into a region of size 7"
"pr101475" { xfail { ! { vect_slp_v8qi_store } } } }
*(AC16*)a15 = Ac16; // { dg-warning "writing 16 bytes into a region of size 15"
"pr101475" { xfail { ! { vect_slp_v16qi_store } } } }
diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c
b/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c
index 52467267a04..6744a63c819 100644
--- a/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c
+++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c
@@ -27,10 +27,10 @@ void max_a3_a5 (int i)
by its own warning independently of -Wstringop-overflow. */
char *d = MAX (p, q);
- d[2] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store } } }
+ d[2] = 0; // { dg-warning "writing 4 bytes into a region of size 3"
"pr102706" { target { vect_slp_v4qi_store_2 } } }
d[3] = 0;
d[4] = 0;
- d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102706" { xfail { vect_slp_v4qi_store } } }
+ d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102706" { xfail { vect_slp_v4qi_store_2 } } }
}
@@ -44,10 +44,10 @@ void max_b6_b4 (int i)
char *q = b4 + i;
char *d = MAX (p, q);
- d[3] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store } } }
+ d[3] = 0; // { dg-warning "writing 4 bytes into a region of size 3"
"pr102706" { target { vect_slp_v4qi_store_2 } } }
d[4] = 0;
d[5] = 0;
- d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102706" { xfail { vect_slp_v4qi_store } } }
+ d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102706" { xfail { vect_slp_v4qi_store_2 } } }
}
@@ -83,7 +83,7 @@ struct A3_5
{
char a3[3]; // { dg-message "at offset 3 into destination object 'a3' of size 3"
"pr??????" { xfail *-*-* } }
// refer to pr102697 for xfail
- char a5[5]; // { dg-message "at offset 5 into destination object 'a5' of size 5"
"note" { xfail { vect_slp_v4qi_store } } }
+ char a5[5]; // { dg-message "at offset 5 into destination object 'a5' of size 5"
"note" { xfail { vect_slp_v4qi_store_2 } } }
};
void max_A3_A5 (int i, struct A3_5 *pa3_5)
@@ -96,7 +96,7 @@ void max_A3_A5 (int i, struct A3_5 *pa3_5)
d[2] = 0;
d[3] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr??????" { xfail *-*-* } }
d[4] = 0;
- d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102697" { xfail { vect_slp_v4qi_store } } }
+ d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102697" { xfail { vect_slp_v4qi_store_2 } } }
}
@@ -104,7 +104,7 @@ struct B4_B6
{
char b4[4];
// refer to pr102697 for xfail
- char b6[6]; // { dg-message "at offset \[^a-zA-Z\n\r\]*6\[^a-zA-Z0-9\]* into
destination object 'b6' of size 6" "note" { xfail { vect_slp_v4qi_store } } }
+ char b6[6]; // { dg-message "at offset \[^a-zA-Z\n\r\]*6\[^a-zA-Z0-9\]* into
destination object 'b6' of size 6" "note" { xfail { vect_slp_v4qi_store_2 } } }
};
void max_B6_B4 (int i, struct B4_B6 *pb4_b6)
@@ -116,7 +116,7 @@ void max_B6_B4 (int i, struct B4_B6 *pb4_b6)
d[3] = 0;
d[4] = 0;
d[5] = 0;
- d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102697" { xfail { vect_slp_v4qi_store } } }
+ d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0"
"pr102697" { xfail { vect_slp_v4qi_store_2 } } }
}
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 1c8b1ebb86e..cd8ea593550 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -7588,90 +7588,144 @@ proc check_vect_slp_aligned_store_usage { pattern
macro } {
global tool
set result [check_compile slp_aligned_store_usage assembly {
- char a[16] __attribute__ ((aligned (16)));
- short b[4] __attribute__((aligned(8)));
- int c[4] __attribute__((aligned(16)));
+ extern void sink (void* );
+ #define Ac8 (AC8){ 0, 1, 2, 3, 4, 5, 6, 7 }
+ #define Ac16 (AC16){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15 }
#ifdef TEST_V8QI
+ typedef struct AC8 { char a[8]; } AC8;
+ extern char a8[8];
void
foo ()
{
- a[0] = 0;
- a[1] = 1;
- a[2] = 2;
- a[3] = 3;
- a[4] = 4;
- a[5] = 5;
- a[6] = 6;
- a[7] = 7;
+ *(AC8*)a8 = Ac8;
}
#elif TEST_V16QI
+ typedef struct AC16 { char a[16]; } AC16;
+ extern char a16[16];
void
foo1 ()
{
- a[0] = 0;
- a[1] = 1;
- a[2] = 2;
- a[3] = 3;
- a[4] = 4;
- a[5] = 5;
- a[6] = 6;
- a[7] = 7;
- a[8] = 8;
- a[9] = 9;
- a[10] = 10;
- a[11] = 11;
- a[12] = 12;
- a[13] = 13;
- a[14] = 14;
- a[15] = 15;
+ *(AC16*)a16 = Ac16;
}
#elif TEST_V4QI
+ struct A1
+ {
+ char n;
+ char a[3];
+ };
+
+ extern void sink (void*);
void
foo2 ()
{
- a[0] = 0;
- a[1] = 1;
- a[2] = 2;
- a[3] = 3;
+ struct A1 a = { 0, { } };
+ a.a[0] = 3;
+ a.a[1] = 4;
+ a.a[2] = 5;
+ sink (&a);
+ }
+ #elif TEST_V4QI_2
+ extern char p[4];
+ void
+ foo2_2 ()
+ {
+ p[0] = 0;
+ p[1] = 1;
+ p[2] = 2;
+ p[3] = 3;
+ }
+ #elif TEST_V4QI_3
+ #define Ac4 (AC4){ 0, 1, 2, 3 }
+ typedef struct AC4 { char a[4]; } AC4;
+ extern char a[4];
+ void
+ foo ()
+ {
+ *(AC4*)a = Ac4;
}
#elif TEST_V2QI
+ struct A2
+ {
+ char a[2];
+ };
void
foo3 ()
{
- a[0] = 0;
- a[1] = 1;
+ struct A2 a;
+ a.a[0] = 3;
+ a.a[1] = 4;
+ sink (&a);
}
+
#elif TEST_V2HI
+ extern char b[4];
void
foo4 ()
{
- b[0] = 0;
- b[1] = 1;
+ *(short*) b = 0;
+ *(short*) (b + 2) = 1;
+ }
+ #elif TEST_V2HI_2
+ struct Ax
+ {
+ int n;
+ short a[2];
+ };
+ void
+ foo4_2 (struct Ax *p)
+ {
+ p->a[0] = 0;
+ p->a[1] = 1;
}
#elif TEST_V4HI
+ struct Ax
+ {
+ int n;
+ short a[4];
+ };
void
- foo5 ()
+ foo5 (struct Ax *p)
{
- b[0] = 0;
- b[1] = 1;
- b[2] = 2;
- b[3] = 3;
+ p->a[0] = 0;
+ p->a[1] = 1;
+ p->a[2] = 2;
+ p->a[3] = 3;
}
#elif TEST_V2SI
+ struct A { int i; };
+ struct B { int j; struct A a[2]; };
+
+ struct C
+ {
+ struct B b1;
+ struct B b2;
+ };
+ char cbuf2[2 * sizeof (struct C)] = { };
void
foo6 ()
{
- c[0] = 0;
- c[1] = 1;
+ struct C *p = (struct C*)&cbuf2;
+ p->b2.a[0].i = 0;
+ p->b2.a[1].i = 0;
}
#elif TEST_V4SI
+ struct A { int i; };
+ struct B { int j; struct A a[4]; };
+
+ struct C
+ {
+ struct B b1;
+ struct B b2;
+ };
+ char cbuf2[2 * sizeof (struct C)] = { };
void
- foo7 ()
+ foo6 ()
{
- c[0] = 0;
- c[1] = 1;
- c[2] = 2;
- c[3] = 3;
+ struct C *p = (struct C*)&cbuf2;
+ p->b2.a[0].i = 0;
+ p->b2.a[1].i = 0;
+ p->b2.a[2].i = 0;
+ p->b2.a[3].i = 0;
}
#endif
} "-O2 -fopt-info-all -D$macro" ]
@@ -7691,6 +7745,10 @@ proc check_vect_slp_aligned_store_usage { pattern macro
} {
# Return the true if target support vectorization of 2-byte char stores
# with 2-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v2qi_store { } {
set pattern {add new stmt: MEM <vector\(2\) char>}
set macro "TEST_V2QI"
@@ -7701,6 +7759,10 @@ proc check_effective_target_vect_slp_v2qi_store { } {
# Return the true if target support vectorization of 4-byte char stores
# with 4-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v4qi_store { } {
set pattern {add new stmt: MEM <vector\(4\) char>}
set macro "TEST_V4QI"
@@ -7708,8 +7770,26 @@ proc check_effective_target_vect_slp_v4qi_store { } {
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
}
+proc check_effective_target_vect_slp_v4qi_store_2 { } {
+ set pattern {add new stmt: MEM <vector\(4\) char>}
+ set macro "TEST_V4QI_2"
+ return [check_cached_effective_target vect_slp_v4qi_store_2 {
+ expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
+}
+
+proc check_effective_target_vect_slp_v4qi_store_3 { } {
+ set pattern {add new stmt: MEM <vector\(4\) char>}
+ set macro "TEST_V4QI_3"
+ return [check_cached_effective_target vect_slp_v4qi_store_3 {
+ expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
+}
+
# Return the true if target support vectorization of 8-byte char stores
# with 8-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v8qi_store { } {
set pattern {add new stmt: MEM <vector\(8\) char>}
set macro "TEST_V8QI"
@@ -7719,6 +7799,10 @@ proc check_effective_target_vect_slp_v8qi_store { } {
# Return the true if target support vectorization of 16-byte char stores
# with 16-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v16qi_store { } {
set pattern {add new stmt: MEM <vector\(16\) char>}
set macro "TEST_V16QI"
@@ -7728,6 +7812,10 @@ proc check_effective_target_vect_slp_v16qi_store { } {
# Return the true if target support vectorization of 4-byte short stores
# with 4-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v2hi_store { } {
set pattern {add new stmt: MEM <vector\(2\) short int>}
set macro "TEST_V2HI"
@@ -7735,8 +7823,19 @@ proc check_effective_target_vect_slp_v2hi_store { } {
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
}
+proc check_effective_target_vect_slp_v2hi_store_2 { } {
+ set pattern {add new stmt: MEM <vector\(2\) short int>}
+ set macro "TEST_V2HI_2"
+ return [check_cached_effective_target vect_slp_v2hi_store_2 {
+ expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
+}
+
# Return the true if target support vectorization of 8-byte short stores
# with 8-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v4hi_store { } {
set pattern {add new stmt: MEM <vector\(4\) short int>}
set macro "TEST_V4HI"
@@ -7746,6 +7845,10 @@ proc check_effective_target_vect_slp_v4hi_store { } {
# Return the true if target support vectorization of 8-byte int stores
# with 8-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v2si_store { } {
set pattern {add new stmt: MEM <vector\(2\) int>}
set macro "TEST_V2SI"
@@ -7755,6 +7858,10 @@ proc check_effective_target_vect_slp_v2si_store { } {
# Return the true if target support vectorization of 16-byte int stores
# with 16-byte aligned address at plain O2.
+# NB: This target should be removed after real issues are fixed for
+# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
+# this target since tests in check_vect_slp_aligned_store_usage
+# is the exact match of relative testcases
proc check_effective_target_vect_slp_v4si_store { } {
set pattern {add new stmt: MEM <vector\(4\) int>}
set macro "TEST_V4SI"
