commit 247c407c83f0015f4b92d5f71e45b63192f6757e
Author: Roger Sayle <ro...@nextmovesoftware.com>
Date: Mon Oct 18 12:15:40 2021 +0100
Try placing RTL folded constants in the constant pool.
My recent attempts to come up with a testcase for my patch to evaluate
ss_plus in simplify-rtx.c, identified a missed optimization opportunity
(that's potentially a long-time regression): The RTL optimizers no longer
place constants in the constant pool.
changed -m32 codegen from
movq .LC1, %mm0
paddb .LC0, %mm0
movq %mm0, x
ret
to
movl $807671820, %eax
movl $1616136252, %edx
movl %eax, x
movl %edx, x+4
ret
and -m64 codegen from
movq .LC1(%rip), %mm0
paddb .LC0(%rip), %mm0
movq %xmm0, x(%rip)
ret
to
movq .LC2(%rip), %rax
movq %rax, x(%rip)
ret
Adjust pr22076.c to check that MMX register isn't used since avoiding
MMX register isn't a bad thing.
PR testsuite/102840
* gcc.target/i386/pr22076.c: Updated to check that MMX register
isn't used.
---
gcc/testsuite/gcc.target/i386/pr22076.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/i386/pr22076.c
b/gcc/testsuite/gcc.target/i386/pr22076.c
index 427ffcd4920..aa06f057690 100644
--- a/gcc/testsuite/gcc.target/i386/pr22076.c
+++ b/gcc/testsuite/gcc.target/i386/pr22076.c
@@ -15,5 +15,6 @@ void test ()
x = _mm_add_pi8 (mm0, mm1);
}
-/* { dg-final { scan-assembler-times "movq" 2 } } */
-/* { dg-final { scan-assembler-not "movl" { target nonpic } } } */
+/* { dg-final { scan-assembler-times "movq" 2 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "movl" 4 { target { nonpic && ia32 } } }
} */
+/* { dg-final { scan-assembler-not "%mm" } } */
--
2.32.0
