Hi,
The second form is redundant in
;; Stores and loads of ax to arbitrary constant address.
;; We fake an second form of instruction to force reload to load address
;; into register when rax is not available
(define_insn "*movabs<mode>_1"
[(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
(match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
"TARGET_64BIT && ix86_check_movabs (insn, 0)"
"@
movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}
mov{<imodesuffix>}\t{%1, %a0|%a0, %1}"
[(set_attr "type" "imov")
(set_attr "modrm" "0,*")
(set_attr "length_address" "8,0")
(set_attr "length_immediate" "0,*")
(set_attr "memory" "store")
(set_attr "mode" "<MODE>")])
since it is just normal mov<mode>. Tested on Linux/x86-64. OK for stage1?
Thanks.
H.J.
----
2012-02-23 H.J. Lu <[email protected]>
PR target/52352
PR target/52364
* config/i386/i386.md (*movabs<mode>_1): Remove the second form.
(*movabs<mode>_2): Likewise.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index ec3993a..9242926 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2335,32 +2335,26 @@
(const_string "QI")))])
;; Stores and loads of ax to arbitrary constant address.
-;; We fake an second form of instruction to force reload to load address
-;; into register when rax is not available
(define_insn "*movabs<mode>_1"
- [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
- (match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
+ [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i"))
+ (match_operand:SWI1248x 1 "register_operand" "a"))]
"TARGET_64BIT && ix86_check_movabs (insn, 0)"
- "@
- movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}
- mov{<imodesuffix>}\t{%1, %a0|%a0, %1}"
+ "movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}"
[(set_attr "type" "imov")
- (set_attr "modrm" "0,*")
- (set_attr "length_address" "8,0")
- (set_attr "length_immediate" "0,*")
+ (set_attr "modrm" "0")
+ (set_attr "length_address" "8")
+ (set_attr "length_immediate" "0")
(set_attr "memory" "store")
(set_attr "mode" "<MODE>")])
(define_insn "*movabs<mode>_2"
- [(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
- (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
+ [(set (match_operand:SWI1248x 0 "register_operand" "=a")
+ (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i")))]
"TARGET_64BIT && ix86_check_movabs (insn, 1)"
- "@
- movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}
- mov{<imodesuffix>}\t{%a1, %0|%0, %a1}"
+ "movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}"
[(set_attr "type" "imov")
- (set_attr "modrm" "0,*")
- (set_attr "length_address" "8,0")
+ (set_attr "modrm" "0")
+ (set_attr "length_address" "8")
(set_attr "length_immediate" "0")
(set_attr "memory" "load")
(set_attr "mode" "<MODE>")])
