On 7/28/21 9:43 AM, Richard Biener wrote:
> On Wed, Jul 28, 2021 at 8:44 AM Andreas Krebbel via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
>>
>> There are also memory operands passed for in0 and in1.
>>
>> Ok for mainline?
>
> They can also be constant vectors, I'd just not specify the operand
> kind - usually
> expanders are not limited as to what they feed down.
Right, I'll just replace "registers" with "operands" then. Ok?
also to emit such a permutation. In the former case @var{in0}, @var{in1}\n\
and @var{out} are all null. In the latter case @var{in0} and @var{in1} are\n\
the source vectors and @var{out} is the destination vector; all three are\n\
-registers of mode @var{mode}. @var{in1} is the same as @var{in0} if\n\
+operands of mode @var{mode}. @var{in1} is the same as @var{in0} if\n\
@var{sel} describes a permutation on one vector instead of two.\n\
\n\
Return true if the operation is possible, emitting instructions for it\n\
Andreas
