[PATCH 56/62] AVX512FP16: Optimize (_Float16) sqrtf ((float) f16) to sqrtf16 (f16).

[liuhongt via Gcc-patches]

gcc/ChangeLog:

        * config/i386/i386.md (*sqrthf2): New define_insn.
        * config/i386/sse.md
        (*avx512fp16_vmsqrthf2<mask_scalar_name><round_scalar_name>):
        Ditto.

gcc/testsuite/ChangeLog:

        * gcc.target/i386/avx512fp16-builtin-sqrt-2.c: New test.
---
 gcc/config/i386/i386.md                        | 18 ++++++++++++++++++
 gcc/config/i386/sse.md                         | 18 ++++++++++++++++++
 .../i386/avx512fp16-builtin-sqrt-2.c           | 18 ++++++++++++++++++
 3 files changed, 54 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-builtin-sqrt-2.c

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 5f45c4ff583..684b2080a93 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -16583,6 +16583,24 @@ (define_insn "*sqrt<mode>2_sse"
            ]
            (symbol_ref "true")))])
 
+/* Optimize for code like (_Float16) __builtin_sqrtf ((float) f16)
+   since it's not handled in frontend.  */
+(define_insn "*sqrthf2"
+  [(set (match_operand:HF 0 "register_operand" "=v,v")
+       (float_truncate:HF
+         (sqrt:MODEF
+           (float_extend:MODEF
+             (match_operand:HF 1 "nonimmediate_operand" "v,m")))))]
+  "TARGET_AVX512FP16"
+  "@
+   vsqrtsh\t{%d1, %0|%0, %d1}
+   vsqrtsh\t{%1, %d0|%d0, %1}"
+  [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "sqrt")
+   (set_attr "prefix" "evex")
+   (set_attr "avx_partial_xmm_update" "false,true")
+   (set_attr "mode" "HF")])
+
 (define_expand "sqrthf2"
   [(set (match_operand:HF 0 "register_operand")
        (sqrt:HF
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a76c30c75cb..f87f6893835 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -2407,6 +2407,24 @@ (define_insn 
"*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>"
    (set_attr "btver2_sse_attr" "sqrt")
    (set_attr "mode" "<ssescalarmode>")])
 
+(define_insn "*avx512fp16_vmsqrthf2<mask_scalar_name><round_scalar_name>"
+  [(set (match_operand:V8HF 0 "register_operand" "=v")
+       (vec_merge:V8HF
+         (vec_duplicate:V8HF
+           (float_truncate:HF
+             (sqrt:MODEF
+               (float_extend:MODEF
+                 (match_operand:HF 1 "nonimmediate_operand" 
"<round_scalar_constraint>")))))
+         (match_operand:VFH_128 2 "register_operand" "v")
+         (const_int 1)))]
+  "TARGET_AVX512FP16"
+  "vsqrtsh\t{<round_scalar_mask_op3>%1, %2, 
%0<mask_scalar_operand3>|%0<mask_scalar_operand3>, %2, 
%1<round_scalar_mask_op3>}"
+  [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "sqrt")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "HF")])
+
+
 (define_expand "rsqrt<mode>2"
   [(set (match_operand:VF1_AVX512ER_128_256 0 "register_operand")
        (unspec:VF1_AVX512ER_128_256
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-sqrt-2.c 
b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-sqrt-2.c
new file mode 100644
index 00000000000..4fefee179af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-sqrt-2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mavx512fp16" } */
+
+#include<math.h>
+_Float16
+foo (_Float16 f16)
+{
+  return sqrtf (f16);
+}
+
+_Float16
+foo1 (_Float16 f16)
+{
+  return sqrt (f16);
+}
+
+/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } } */
+/* { dg-final { scan-assembler-times "vsqrtsh\[^\n\r\]*xmm\[0-9\]" 2 } } */
-- 
2.18.1