On Wed, Jun 23, 2021 at 06:56:37PM -0500, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Jun 17, 2021 at 03:18:48PM -0400, Michael Meissner wrote:
> > > The actual insns only check TARGET_POWER10 (so no TARGET_FLOAT128_HW).
> > > Which is right, this or that?
> >
> > It should include TARGET_FLOAT128_HW.
>
> Okay, so fix that :-)
> > The problem area is a power10 running in
> > big endian mode and running 32-bit code. Because we don't have TImode, we
> > can't enable the IEEE 128-bit hardware instructions.
>
> I don't see why not?
>
> > > > +/* { dg-require-effective-target ppc_float128_hw } */
> > > > +/* { dg-require-effective-target power10_ok } */
> > > > +/* { dg-options "-mdejagnu-cpu=power10 -O2 -ffast-math" } */
> > >
> > > In testcases we can assume that float128_hw is set whenever we have a
> > > p10; we don't manually disable it to make live hard for ourselves ;-)
> >
> > Again, I put it in case somebody builds a BE power10 compiler.
>
> This should still be fixed. And yes, people do test BE p10, of course.
> And BE p10 *should* enable the QP float insns. Does it not currently?
GCC does not enable __float128 by default on BE. The reason is there are no
plans to enable all of the float128 support in glibc in BE. Without a library,
it is kind of useless to enable __float128.
If the compiler enabled __float128, It breaks things that check if __float128
is avaiable. They think __float128 is available, and then they fail when when
they can't anything besides basic arithmetic.
Because the compiler is configured not to enable __float128 in a BE context, we
don't build the __float128 emulator in libgcc.
In addition, BE GCC runs on things that does not have GLIBC (like AIX). If we
enabled it by default, it would break those environments.
A further complication is BE by default is still power4 or power5. You need
VSX support to even pass __float128 arguments. While it is possible to pass
__float128 in GPRs, you run into compatibility issues if one module is compiled
with VSX and another is compiled without setting a base cpu, because one module
will expect things in GPRs and the other in Altivec registers.
And as I've said, the issue with 32-bit move is we don't have TImode support.
Some of the machine indepenent passes want to use an appropriate integer type
to move basic types.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
