Jonathan Wright via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
> Hi,
>
> Saturating truncation can be expressed using the RTL expressions
> ss_truncate and us_truncate. This patch changes the implementation
> of the vqmovn_* Neon intrinsics to use these RTL expressions rather
> than a pair of unspecs. The redundant unspecs are removed along with
> their code iterator.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?

OK.  Nice clean-up, thanks.

Richard

> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-04-12  Jonathan Wright  <jonathan.wri...@arm.com>
>
>       * config/aarch64/aarch64-simd-builtins.def: Modify comment to
>       make consistent with updated RTL pattern.
>       * config/aarch64/aarch64-simd.md (aarch64_<sur>qmovn<mode>):
>       Implement using ss_truncate and us_truncate rather than
>       unspecs.
>       * config/aarch64/iterators.md: Remove redundant unspecs and
>       iterator: UNSPEC_[SU]QXTN and SUQMOVN respectively.
>
> diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def 
> b/gcc/config/aarch64/aarch64-simd-builtins.def
> index 
> e4a9e8740c5f87f1d7feb8f6a9725d7def1a0323..1e81bb53287e9797f3539c2c64ed11c6c26d6e4e
>  100644
> --- a/gcc/config/aarch64/aarch64-simd-builtins.def
> +++ b/gcc/config/aarch64/aarch64-simd-builtins.def
> @@ -268,7 +268,7 @@
>    /* Implemented by aarch64_sqxtun2<mode>.  */
>    BUILTIN_VQN (BINOP_UUS, sqxtun2, 0, NONE)
>  
> -  /* Implemented by aarch64_<sur>qmovn<mode>.  */
> +  /* Implemented by aarch64_<su>qmovn<mode>.  */
>    BUILTIN_VSQN_HSDI (UNOP, sqmovn, 0, NONE)
>    BUILTIN_VSQN_HSDI (UNOP, uqmovn, 0, NONE)
>  
> diff --git a/gcc/config/aarch64/aarch64-simd.md 
> b/gcc/config/aarch64/aarch64-simd.md
> index 
> 7bba87ff4be2eb19c8399272dce8a7108fdc4022..2c68e2f70ab38b44ddb36e40acbd249831a0e630
>  100644
> --- a/gcc/config/aarch64/aarch64-simd.md
> +++ b/gcc/config/aarch64/aarch64-simd.md
> @@ -4849,12 +4849,12 @@
>  
>  ;; sqmovn and uqmovn
>  
> -(define_insn "aarch64_<sur>qmovn<mode>"
> +(define_insn "aarch64_<su>qmovn<mode>"
>    [(set (match_operand:<VNARROWQ> 0 "register_operand" "=w")
> -     (unspec:<VNARROWQ> [(match_operand:VSQN_HSDI 1 "register_operand" "w")]
> -                            SUQMOVN))]
> +     (SAT_TRUNC:<VNARROWQ>
> +    (match_operand:VSQN_HSDI 1 "register_operand" "w")))]
>    "TARGET_SIMD"
> -  "<sur>qxtn\\t%<vn2>0<Vmntype>, %<v>1<Vmtype>"
> +  "<su>qxtn\\t%<vn2>0<Vmntype>, %<v>1<Vmtype>"
>     [(set_attr "type" "neon_sat_shift_imm_narrow_q")]
>  )
>  
> diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
> index 
> a48b240aeda564ea7535c94883baf21903e88e2a..4889b8674bcbc0fea863329a35dc496c7468f03d
>  100644
> --- a/gcc/config/aarch64/iterators.md
> +++ b/gcc/config/aarch64/iterators.md
> @@ -524,8 +524,6 @@
>      UNSPEC_SUQADD    ; Used in aarch64-simd.md.
>      UNSPEC_SQXTUN    ; Used in aarch64-simd.md.
>      UNSPEC_SQXTUN2   ; Used in aarch64-simd.md.
> -    UNSPEC_SQXTN     ; Used in aarch64-simd.md.
> -    UNSPEC_UQXTN     ; Used in aarch64-simd.md.
>      UNSPEC_SSRA              ; Used in aarch64-simd.md.
>      UNSPEC_USRA              ; Used in aarch64-simd.md.
>      UNSPEC_SRSRA     ; Used in aarch64-simd.md.
> @@ -2263,8 +2261,6 @@
>  
>  (define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD])
>  
> -(define_int_iterator SUQMOVN [UNSPEC_SQXTN UNSPEC_UQXTN])
> -
>  (define_int_iterator VSHL [UNSPEC_SSHL UNSPEC_USHL
>                          UNSPEC_SRSHL UNSPEC_URSHL])
>  
> @@ -3007,7 +3003,6 @@
>                     (UNSPEC_SUBHN "") (UNSPEC_RSUBHN "r")
>                     (UNSPEC_ADDHN2 "") (UNSPEC_RADDHN2 "r")
>                     (UNSPEC_SUBHN2 "") (UNSPEC_RSUBHN2 "r")
> -                   (UNSPEC_SQXTN "s") (UNSPEC_UQXTN "u")
>                     (UNSPEC_USQADD "us") (UNSPEC_SUQADD "su")
>                     (UNSPEC_SSLI  "s") (UNSPEC_USLI  "u")
>                     (UNSPEC_SSRI  "s") (UNSPEC_USRI  "u")

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