Hi Jonathan, > -----Original Message----- > From: Jonathan Wright <jonathan.wri...@arm.com> > Sent: 27 January 2021 16:03 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Subject: [PATCH] aarch64: Use GCC vector extensions for FP ml[as]_n > intrinsics > > Hi, > > As subject, this patch rewrites floating-point mla_n/mls_n intrinsics to use > a + b * c / a - b * c rather than inline assembly code, allowing for better > scheduling and optimization. > > Regression tested and bootstrapped on aarch64-none-linux-gnu - no > issues. > > Ok for master?
I'm quite keen to remove that ugly inline asm, but I'm a bit concerned about the floating-point semantics now being affected by things like FP contractions. The intrinsics are supposed to preserve the semantics of the instructions as much as possible. Richard, does this mean we'll want to implement this using RTL builtins, like for the integer ones? Thanks, Kyrill > > Thanks, > Jonathan > > --- > > gcc/ChangeLog: > > 2021-01-18 Jonathan Wright <jonathan.wri...@arm.com> > > * config/aarch64/arm_neon.h (vmla_n_f32): Use C rather than asm. > (vmlaq_n_f32): Likewise. > (vmls_n_f32): Likewise. > (vmlsq_n_f32): Likewise.
