On 1/12/21 12:35 PM, Richard Sandiford wrote:
> This patch fixes a regression on sh4 introduced by the rtl-ssa stuff.
> The port had a pattern:
>
> (define_insn "movsf_ie"
>   [(set (match_operand:SF 0 "general_movdst_operand"
>                               "=f,r,f,f,fy, f,m, r, r,m,f,y,y,rf,r,y,<,y,y")
>       (match_operand:SF 1 "general_movsrc_operand"
>                               " f,r,G,H,FQ,mf,f,FQ,mr,r,y,f,>,fr,y,r,y,>,y"))
>    (use (reg:SI FPSCR_MODES_REG))
>    (clobber (match_scratch:SI 2 "=X,X,X,X,&z, X,X, X, X,X,X,X,X, 
> y,X,X,X,X,X"))]
>   "TARGET_SH2E
>    && (arith_reg_operand (operands[0], SFmode)
>        || fpul_operand (operands[0], SFmode)
>        || arith_reg_operand (operands[1], SFmode)
>        || fpul_operand (operands[1], SFmode)
>        || arith_reg_operand (operands[2], SImode))"
>
> But recog can generate this pattern from something that matches:
>
>   [(set (match_operand:SF 0 "general_movdst_operand")
>       (match_operand:SF 1 "general_movsrc_operand")
>    (use (reg:SI FPSCR_MODES_REG))]
>
> with recog adding the (clobber (match_scratch:SI)) automatically.
> recog tests the C condition before adding the clobber, so there might
> not be an operands[2] to test.
>
> Similarly, gen_movsf_ie takes only two arguments, with operand 2
> being filled in automatically.  The only way to create this pattern
> with a REG operands[2] before RA would be to generate it directly
> from RTL.  AFAICT the only things that do this are the secondary
> reload patterns, which are generated during RA and come with
> pre-vetted operands.
>
> arith_reg_operand rejects 6 specific registers:
>
>       return (regno != T_REG && regno != PR_REG
>             && regno != FPUL_REG && regno != FPSCR_REG
>             && regno != MACH_REG && regno != MACL_REG);
>
> The fpul_operand tests allow FPUL_REG, leaving 5 invalid registers.
> However, in all alternatives of movsf_ie, either operand 0 or
> operand 1 is a register that belongs r, f or y, none of which
> include any of the 5 rejected registers.  This means that any
> post-RA pattern would satisfy the operands[0] or operands[1]
> condition without the operands[2] test being necessary.
>
> Tested on sh4-elf, which it fixes quite a few ICEs.  OK to install?
OK.

Hopefully sh4/sh4eb will bootstrap again after you install that change. 
Thanks!

jeff
>
> Richard
>
>
> gcc/
>       * config/sh/sh.md (movsf_ie): Remove operands[2] test.
> ---
>  gcc/config/sh/sh.md | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
> index fe1231612cc..e3af9ae21c1 100644
> --- a/gcc/config/sh/sh.md
> +++ b/gcc/config/sh/sh.md
> @@ -6067,8 +6067,7 @@ (define_insn "movsf_ie"
>     && (arith_reg_operand (operands[0], SFmode)
>         || fpul_operand (operands[0], SFmode)
>         || arith_reg_operand (operands[1], SFmode)
> -       || fpul_operand (operands[1], SFmode)
> -       || arith_reg_operand (operands[2], SImode))"
> +       || fpul_operand (operands[1], SFmode))"
>    "@
>       fmov    %1,%0
>       mov     %1,%0
>

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