On 11/01/2021 15:26, Richard Earnshaw wrote:
> On 11/01/2021 11:10, g...@danielengel.com wrote:
>> From: Daniel Engel <g...@danielengel.com>
>>
>> gcc/libgcc/ChangeLog:
>> 2021-01-07 Daniel Engel <g...@danielengel.com>
>>
>> * config/arm/lib1funcs.S: Move __clzsi2() and __clzdi2() to
>> * config/arm/bits/clz2.S: New file.
>
> No, please don't push these down into a subdirectory. They do not
> represent a clear subfunctional distinction, so creating a load of disk
> hierarcy is just confusing. Just put the code in config/arm/clz.S
>
> Otherwise this is just a re-org, so it's OK.
Oops, missed that as a new file, this needs to copy over the original
copyright message.
Same with the other re-orgs that split code up.
R.
>
> R.
>
>> ---
>> libgcc/config/arm/bits/clz2.S | 124 ++++++++++++++++++++++++++++++++++
>> libgcc/config/arm/lib1funcs.S | 123 +--------------------------------
>> 2 files changed, 125 insertions(+), 122 deletions(-)
>> create mode 100644 libgcc/config/arm/bits/clz2.S
>>
>> diff --git a/libgcc/config/arm/bits/clz2.S b/libgcc/config/arm/bits/clz2.S
>> new file mode 100644
>> index 00000000000..1c8f10a5b29
>> --- /dev/null
>> +++ b/libgcc/config/arm/bits/clz2.S
>> @@ -0,0 +1,124 @@
>> +
>> +#ifdef L_clzsi2
>> +#ifdef NOT_ISA_TARGET_32BIT
>> +FUNC_START clzsi2
>> + movs r1, #28
>> + movs r3, #1
>> + lsls r3, r3, #16
>> + cmp r0, r3 /* 0x10000 */
>> + bcc 2f
>> + lsrs r0, r0, #16
>> + subs r1, r1, #16
>> +2: lsrs r3, r3, #8
>> + cmp r0, r3 /* #0x100 */
>> + bcc 2f
>> + lsrs r0, r0, #8
>> + subs r1, r1, #8
>> +2: lsrs r3, r3, #4
>> + cmp r0, r3 /* #0x10 */
>> + bcc 2f
>> + lsrs r0, r0, #4
>> + subs r1, r1, #4
>> +2: adr r2, 1f
>> + ldrb r0, [r2, r0]
>> + adds r0, r0, r1
>> + bx lr
>> +.align 2
>> +1:
>> +.byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
>> + FUNC_END clzsi2
>> +#else
>> +ARM_FUNC_START clzsi2
>> +# if defined (__ARM_FEATURE_CLZ)
>> + clz r0, r0
>> + RET
>> +# else
>> + mov r1, #28
>> + cmp r0, #0x10000
>> + do_it cs, t
>> + movcs r0, r0, lsr #16
>> + subcs r1, r1, #16
>> + cmp r0, #0x100
>> + do_it cs, t
>> + movcs r0, r0, lsr #8
>> + subcs r1, r1, #8
>> + cmp r0, #0x10
>> + do_it cs, t
>> + movcs r0, r0, lsr #4
>> + subcs r1, r1, #4
>> + adr r2, 1f
>> + ldrb r0, [r2, r0]
>> + add r0, r0, r1
>> + RET
>> +.align 2
>> +1:
>> +.byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
>> +# endif /* !defined (__ARM_FEATURE_CLZ) */
>> + FUNC_END clzsi2
>> +#endif
>> +#endif /* L_clzsi2 */
>> +
>> +#ifdef L_clzdi2
>> +#if !defined (__ARM_FEATURE_CLZ)
>> +
>> +# ifdef NOT_ISA_TARGET_32BIT
>> +FUNC_START clzdi2
>> + push {r4, lr}
>> + cmp xxh, #0
>> + bne 1f
>> +# ifdef __ARMEB__
>> + movs r0, xxl
>> + bl __clzsi2
>> + adds r0, r0, #32
>> + b 2f
>> +1:
>> + bl __clzsi2
>> +# else
>> + bl __clzsi2
>> + adds r0, r0, #32
>> + b 2f
>> +1:
>> + movs r0, xxh
>> + bl __clzsi2
>> +# endif
>> +2:
>> + pop {r4, pc}
>> +# else /* NOT_ISA_TARGET_32BIT */
>> +ARM_FUNC_START clzdi2
>> + do_push {r4, lr}
>> + cmp xxh, #0
>> + bne 1f
>> +# ifdef __ARMEB__
>> + mov r0, xxl
>> + bl __clzsi2
>> + add r0, r0, #32
>> + b 2f
>> +1:
>> + bl __clzsi2
>> +# else
>> + bl __clzsi2
>> + add r0, r0, #32
>> + b 2f
>> +1:
>> + mov r0, xxh
>> + bl __clzsi2
>> +# endif
>> +2:
>> + RETLDM r4
>> + FUNC_END clzdi2
>> +# endif /* NOT_ISA_TARGET_32BIT */
>> +
>> +#else /* defined (__ARM_FEATURE_CLZ) */
>> +
>> +ARM_FUNC_START clzdi2
>> + cmp xxh, #0
>> + do_it eq, et
>> + clzeq r0, xxl
>> + clzne r0, xxh
>> + addeq r0, r0, #32
>> + RET
>> + FUNC_END clzdi2
>> +
>> +#endif
>> +#endif /* L_clzdi2 */
>> +
>> diff --git a/libgcc/config/arm/lib1funcs.S b/libgcc/config/arm/lib1funcs.S
>> index b4541bae791..f5aa5505e9d 100644
>> --- a/libgcc/config/arm/lib1funcs.S
>> +++ b/libgcc/config/arm/lib1funcs.S
>> @@ -1722,128 +1722,7 @@ LSYM(Lover12):
>>
>> #endif /* __symbian__ */
>>
>> -#ifdef L_clzsi2
>> -#ifdef NOT_ISA_TARGET_32BIT
>> -FUNC_START clzsi2
>> - movs r1, #28
>> - movs r3, #1
>> - lsls r3, r3, #16
>> - cmp r0, r3 /* 0x10000 */
>> - bcc 2f
>> - lsrs r0, r0, #16
>> - subs r1, r1, #16
>> -2: lsrs r3, r3, #8
>> - cmp r0, r3 /* #0x100 */
>> - bcc 2f
>> - lsrs r0, r0, #8
>> - subs r1, r1, #8
>> -2: lsrs r3, r3, #4
>> - cmp r0, r3 /* #0x10 */
>> - bcc 2f
>> - lsrs r0, r0, #4
>> - subs r1, r1, #4
>> -2: adr r2, 1f
>> - ldrb r0, [r2, r0]
>> - adds r0, r0, r1
>> - bx lr
>> -.align 2
>> -1:
>> -.byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
>> - FUNC_END clzsi2
>> -#else
>> -ARM_FUNC_START clzsi2
>> -# if defined (__ARM_FEATURE_CLZ)
>> - clz r0, r0
>> - RET
>> -# else
>> - mov r1, #28
>> - cmp r0, #0x10000
>> - do_it cs, t
>> - movcs r0, r0, lsr #16
>> - subcs r1, r1, #16
>> - cmp r0, #0x100
>> - do_it cs, t
>> - movcs r0, r0, lsr #8
>> - subcs r1, r1, #8
>> - cmp r0, #0x10
>> - do_it cs, t
>> - movcs r0, r0, lsr #4
>> - subcs r1, r1, #4
>> - adr r2, 1f
>> - ldrb r0, [r2, r0]
>> - add r0, r0, r1
>> - RET
>> -.align 2
>> -1:
>> -.byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
>> -# endif /* !defined (__ARM_FEATURE_CLZ) */
>> - FUNC_END clzsi2
>> -#endif
>> -#endif /* L_clzsi2 */
>> -
>> -#ifdef L_clzdi2
>> -#if !defined (__ARM_FEATURE_CLZ)
>> -
>> -# ifdef NOT_ISA_TARGET_32BIT
>> -FUNC_START clzdi2
>> - push {r4, lr}
>> - cmp xxh, #0
>> - bne 1f
>> -# ifdef __ARMEB__
>> - movs r0, xxl
>> - bl __clzsi2
>> - adds r0, r0, #32
>> - b 2f
>> -1:
>> - bl __clzsi2
>> -# else
>> - bl __clzsi2
>> - adds r0, r0, #32
>> - b 2f
>> -1:
>> - movs r0, xxh
>> - bl __clzsi2
>> -# endif
>> -2:
>> - pop {r4, pc}
>> -# else /* NOT_ISA_TARGET_32BIT */
>> -ARM_FUNC_START clzdi2
>> - do_push {r4, lr}
>> - cmp xxh, #0
>> - bne 1f
>> -# ifdef __ARMEB__
>> - mov r0, xxl
>> - bl __clzsi2
>> - add r0, r0, #32
>> - b 2f
>> -1:
>> - bl __clzsi2
>> -# else
>> - bl __clzsi2
>> - add r0, r0, #32
>> - b 2f
>> -1:
>> - mov r0, xxh
>> - bl __clzsi2
>> -# endif
>> -2:
>> - RETLDM r4
>> - FUNC_END clzdi2
>> -# endif /* NOT_ISA_TARGET_32BIT */
>> -
>> -#else /* defined (__ARM_FEATURE_CLZ) */
>> -
>> -ARM_FUNC_START clzdi2
>> - cmp xxh, #0
>> - do_it eq, et
>> - clzeq r0, xxl
>> - clzne r0, xxh
>> - addeq r0, r0, #32
>> - RET
>> - FUNC_END clzdi2
>> -
>> -#endif
>> -#endif /* L_clzdi2 */
>> +#include "bits/clz2.S"
>>
>> #ifdef L_ctzsi2
>> #ifdef NOT_ISA_TARGET_32BIT
>>
>
