David:
>
> Hi, Carl
>
> I thought that vector.md was a transfer vector for the patterns and
> instructions were defined in vsx.md. Why are the new insn patterns
> defined in vector.md?
I am a bit of a newbie here. I wasn't aware of any specific guide
lines on the vector instructions. I put them in vector.md since they
are vector instructions. Made sense to me. I can move them to vsx.md
if that is the prefered place, no problem.
>
> > +(define_insn "div<mode>3"
> > + [(set (match_operand:VIlong 0 "vsx_register_operand" "=v")
> > + (div:VIlong (match_operand:VIlong 1 "vsx_register_operand"
> > "v")
> > + (match_operand:VIlong 2 "vsx_register_operand"
> > "v")))]
> > + "TARGET_POWER10"
> > + "vdivs<VIlong_char> %0,%1,%2"
> > + [(set_attr "type" "vecsimple")])
> > +
> > +(define_insn "udiv<mode>3"
> > + [(set (match_operand:VIlong 0 "vsx_register_operand" "=v")
> > + (udiv:VIlong (match_operand:VIlong 1 "vsx_register_operand"
> > "v")
> > + (match_operand:VIlong 2 "vsx_register_operand"
> > "v")))]
> > + "TARGET_POWER10"
> > + "vdivu<VIlong_char> %0,%1,%2"
> > + [(set_attr "type" "vecsimple")])
> > +
> > +(define_insn "vdivs_<mode>"
> > + [(set (match_operand:VIlong 0 "vsx_register_operand" "=v")
> > + (div:VIlong (match_operand:VIlong 1 "vsx_register_operand"
> > "v")
> > + (match_operand:VIlong 2 "vsx_register_operand"
> > "v")))]
> > + "TARGET_POWER10"
> > + "vdivs<VIlong_char> %0,%1,%2"
> > + [(set_attr "type" "vecsimple")])
> > +
> > +(define_insn "vdivu_<mode>"
> > + [(set (match_operand:VIlong 0 "vsx_register_operand" "=v")
> > + (udiv:VIlong (match_operand:VIlong 1 "vsx_register_operand"
> > "v")
> > + (match_operand:VIlong 2 "vsx_register_operand"
> > "v")))]
> > + "TARGET_POWER10"
> > + "vdivu<VIlong_char> %0,%1,%2"
> > + [(set_attr "type" "vecsimple")])
>
> Also, what is the reason to define div<mode>3 and udiv<mode>3, then
> repeat the patterns for vdivs_<mode> and vdivu_<mode>? Is there a
> difference between the two patterns that I'm missing? The new
> builtins should be able to invoke the new named standard
> patterns. Or
> we really want an additional set of patterns that match the builtin
> names?
>
> The div<mode>3 and udiv<mode>3 patterns do not seem to be listed in
> the ChangeLog.
I originally added the vector multiply and divide instructions as
vmult_<mode>, vdivs_<mode>, etc. I couldn't get GCC to generate the
instructions. Bill pointed out that I hadn't used the default names
div<mode>3. I thought I changed the original mult and div names to the
default names. Looks like I didn't get the div stuff all updated in
the patch. So, yea there should just be the div<mode>3 and udiv<mode>3
definitions. My bad, sorry.
I will update the patch, retest and repost. Thanks for the input.
Carl
