> Since "MASKMOVQ mm1, mm2" is an SSE instruction which requires MMX and > MMX/SSE ISAs are handled separately, make __builtin_ia32_maskmovq require > MMX instead of SSE. > > gcc/ > > PR target/97140 > * config/i386/i386-expand.c (ix86_expand_builtin): Require MMX > for __builtin_ia32_maskmovq. > > gcc/testsuite/ > > PR target/97140 > * gcc.target/i386/pr97140.c: New test.
TBH, from your submission, it was not clear to me, what did you want to achieve with the patch. Replies to your own patches were kind of contradicting [1] and confuse the reader even more. It took me a good chunk of time to figure out what the patch does, the git comment was also of no use. I don't think a review should take that long for a simple one-liner. So, to save you and others from a year of futile pinging: Please send a clean submission of a patch, and clearly state that MASKMOVQ can't be easily emulated with SSE instructions, so it is emulated at the intrinsic level. The *builtin* that corresponds to MASKMOVQ instruction requires TARGET_MMX, otherwise MMX registers can't be instantiated ... etc, etc. All this while having in mind that __builtin_ia32_* builtins are not part of a published interface. And please Cc me on patches. [1] https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554385.html Uros.
