ssa-dom-thread-4.c was failing for MIPS because the mips.h definition:
#define LOGICAL_OP_NON_SHORT_CIRCUIT 0
caused "var1 || var2" conditions to be split into two rather than
converted into "(var1 != 0) | (var2 != 0)". I don't know whether
the MIPS definition still makes sense (probably not for Octeon2
at least) but it's too late to change it for this release.
Tested on mips64-linux-gnu and x86_64-linux-gnu. Applied.
Richard
gcc/testsuite/
* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Expect 4 threaded edges for MIPS.
Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c 2012-01-15
18:19:31.000000000 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c 2012-01-15
18:26:13.000000000 +0000
@@ -58,6 +58,9 @@ bitmap_ior_and_compl (bitmap dst, const_
code we missed the edge when the first conditional is false
(b_elt is zero, which means the second conditional is always
zero. */
-/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1"} } */
+/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { !
mips*-*-* } } } } */
+/* MIPS defines LOGICAL_OP_NON_SHORT_CIRCUIT to 0, so we split var1 || var2
+ into two conditions, rather than use (var1 != 0) | (var2 != 0). */
+/* { dg-final { scan-tree-dump-times "Threaded" 4 "dom1" { target mips*-*-* }
} } */
/* { dg-final { cleanup-tree-dump "dom1" } } */
