[PATCH, rs6000] improve vec_ctf invalid parameter handling.
Hi,
Per PR91903, GCC ICEs when we attempt to pass a variable
(or out of range value) into the vec_ctf() builtin. Per
investigation, the parameter checking exists for this
builtin with the int types, but was missing for
the long long types.
This patch adds the missing CODE_FOR_* entries to the
rs6000_expand_binup_builtin to cover that scenario.
This patch also updates some existing tests to remove
calls to vec_ctf() and vec_cts() that contain negative
values.
Regtested clean on power7, power8, power9 Linux targets.
OK for trunk?
THanks,
-Will
PR target/91903
2020-10-26 Will Schmidt <will_schm...@vnet.ibm.com>
gcc/ChangeLog:
* config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add
clauses for CODE_FOR_vsx_xvcvuxddp_scale and
CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code.
gcc/testsuite/ChangeLog:
* testsuite/gcc.target/powerpc/pr91903.c: New test.
* testsuite/gcc.target/powerpc/builtins-1.fold.h: Update.
* testsuite/gcc.target/powerpc/builtins-2.c: Update.
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index b044778a7ae4..eb7e007e68d3 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -9447,11 +9447,13 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree
exp, rtx target)
}
}
else if (icode == CODE_FOR_altivec_vcfux
|| icode == CODE_FOR_altivec_vcfsx
|| icode == CODE_FOR_altivec_vctsxs
- || icode == CODE_FOR_altivec_vctuxs)
+ || icode == CODE_FOR_altivec_vctuxs
+ || icode == CODE_FOR_vsx_xvcvuxddp_scale
+ || icode == CODE_FOR_vsx_xvcvsxddp_scale)
{
/* Only allow 5-bit unsigned literals. */
STRIP_NOPS (arg1);
if (TREE_CODE (arg1) != INTEGER_CST
|| TREE_INT_CST_LOW (arg1) & ~0x1f)
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
b/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
index 8bc5f5e43366..42d552295e3e 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
@@ -212,14 +212,14 @@ int main ()
extern vector unsigned long long u9; u9 = vec_mergeo (u3, u4);
extern vector long long l8; l8 = vec_mul (l3, l4);
extern vector unsigned long long u6; u6 = vec_mul (u3, u4);
- extern vector double dh; dh = vec_ctf (la, -2);
+ extern vector double dh; dh = vec_ctf (la, 2);
extern vector double di; di = vec_ctf (ua, 2);
extern vector int sz; sz = vec_cts (fa, 0x1F);
- extern vector long long l9; l9 = vec_cts (dh, -2);
+ extern vector long long l9; l9 = vec_cts (dh, 2);
extern vector unsigned long long u7; u7 = vec_ctu (di, 2);
extern vector unsigned int usz; usz = vec_ctu (fa, 0x1F);
extern vector float f1; f1 = vec_mergee (fa, fb);
extern vector float f2; f2 = vec_mergeo (fa, fb);
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-2.c
b/gcc/testsuite/gcc.target/powerpc/builtins-2.c
index 2aa23a377992..30acae47faff 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-2.c
@@ -40,16 +40,16 @@ int main ()
if (se[0] != 27L || se[1] != 27L || sf[0] != -14L || sf[1] != -14L
|| ue[0] != 27L || ue[1] != 27L || uf[0] != 14L || uf[1] != 14L)
abort ();
- vector double da = vec_ctf (sa, -2);
+ vector double da = vec_ctf (sa, 2);
vector double db = vec_ctf (ua, 2);
- vector long long sg = vec_cts (da, -2);
+ vector long long sg = vec_cts (da, 2);
vector unsigned long long ug = vec_ctu (db, 2);
- if (da[0] != 108.0 || da[1] != -56.0 || db[0] != 6.75 || db[1] != 3.5
+ if (da[0] != 6.75 || da[1] != -3.5 || db[0] != 6.75 || db[1] != 3.5
|| sg[0] != 27L || sg[1] != -14L || ug[0] != 27L || ug[1] != 14L)
abort ();
vector float fa = vec_ctf (inta, 5);
if (fa[0] != 0.843750 || fa[1] != -0.031250 || fa[2] != 0.125000 || fa[3] !=
0.281250)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr91903.c
b/gcc/testsuite/gcc.target/powerpc/pr91903.c
new file mode 100644
index 000000000000..f0792117a88f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr91903.c
@@ -0,0 +1,74 @@
+/* { dg-do compile */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-options "-mdejagnu-cpu=power8" } */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <altivec.h>
+
+vector double retd;
+vector float retf;
+vector signed int retsi;
+
+void test_int(vector signed int a, const int b)
+{
+ retf = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned
literal" } */
+ retf = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,1);
+ retf = vec_ctf(a,31);
+ retf = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+}
+
+void test_uint(vector unsigned int a, const int b)
+{
+ retf = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned
literal" } */
+ retf = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,1);
+ retf = vec_ctf(a,31);
+ retf = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retf = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+}
+
+void test_longlong(vector signed long long a, const int b,int x)
+{
+ retd = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned
literal" } */
+ retd = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,1);
+ retd = vec_ctf(a,31);
+ retd = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+}
+
+void test_ulonglong(vector unsigned long long a, const int b,int x)
+{
+ retd = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned
literal" } */
+ retd = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,1);
+ retd = vec_ctf(a,31);
+ retd = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retd = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+}
+
+
+void test_cts_1(vector float a, const int b)
+{
+ retsi = vec_cts(a,b); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retsi = vec_cts(a,-1); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retsi = vec_cts(a,-31); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retsi = vec_cts(a,-32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retsi = vec_cts(a,1);
+ retsi = vec_cts(a,31);
+ retsi = vec_cts(a,32); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+ retsi = vec_cts(a,42); /* { dg-error "argument 2 must be a 5-bit
unsigned literal" } */
+}
+
