On Wed, Oct 21, 2020 at 11:11 AM Hongyu Wang <wwwhhhyyy...@gmail.com> wrote: > > Hi, > > > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > > think that the new patterns should follow the same path as vzeroall > > and vzeroupper patterns, where we emit the pattern with explicit hard > > regs. > > > > BTW: We do have SSE_FIRST_REG class, but this class was added to solve > > some reload problems in the past by marking %xmm0 as likely spilled. > > Thanks for your suggestion, we have removed the register classes and > constraints, and > set explicit sse hard registers in the expander. The corresponding patterns > are also adjusted, > > Update and rebased patch.
The attached patch goes only half-way to using explicit registers. As said previously, please see how avx_vzeroall expander is generating its insn pattern, and how *avx_vzeroall matches the generated pattern using "vzeroall_operation" predicate. Uros.
