On Mon, Oct 19, 2020 at 11:37 AM Hongtao Liu <crazy...@gmail.com> wrote:
>
> On Mon, Oct 19, 2020 at 5:07 PM Richard Biener
> <richard.guent...@gmail.com> wrote:
> >
> > On Mon, Oct 19, 2020 at 10:21 AM Hongtao Liu <crazy...@gmail.com> wrote:
> > >
> > > Hi:
> > > It's implemented as below:
> > > V setg (V v, int idx, T val)
> > >
> > > {
> > > V idxv = (V){idx, idx, idx, idx, idx, idx, idx, idx};
> > > V valv = (V){val, val, val, val, val, val, val, val};
> > > V mask = ((V){0, 1, 2, 3, 4, 5, 6, 7} == idxv);
> > > v = (v & ~mask) | (valv & mask);
> > > return v;
> > > }
> > >
> > > Bootstrap is fine, regression test for i386/x86-64 backend is ok.
> > > Ok for trunk?
> >
> > Hmm, I guess you're trying to keep the code for !AVX512BW simple
> > but isn't just splitting the compare into
> >
> > clow = {0, 1, 2, 3 ... } == idxv
> > chigh = {16, 17, 18, ... } == idxv;
> > cmp = {clow, chigh}
> >
>
> We also don't have 512-bits byte/word blend instructions without
> TARGET_AVX512W, so how to use 512-bits cmp?
Oh, I see. Guess two back-to-back vpternlog could emulate
the blend? Not sure if important - I recall only knl didn't have bw?
> cut from i386-expand.c:
> in ix86_expand_sse_movcc
> 3682 case E_V64QImode:
> 3683 gen = gen_avx512bw_blendmv64qi; ---> TARGET_AVX512BW needed
> 3684 break;
> 3685 case E_V32HImode:
> 3686 gen = gen_avx512bw_blendmv32hi; --> TARGET_AVX512BW needed
> 3687 break;
> 3688 case E_V16SImode:
> 3689 gen = gen_avx512f_blendmv16si;
> 3690 break;
> 3691 case E_V8DImode:
> 3692 gen = gen_avx512f_blendmv8di;
> 3693 break;
> 3694 case E_V8DFmode:
>
> > faster, smaller and eventually even easier during expansion?
> >
> > + gcc_assert (ix86_expand_vector_init_duplicate (false, mode, valv, val));
> > + gcc_assert (ix86_expand_vector_init_duplicate (false, cmp_mode,
> > idxv, idx_tmp));
> >
> > side-effects in gcc_assert is considered bad style, use
> >
> > ok = ix86_expand_vector_init_duplicate (false, mode, valv, val);
> > gcc_assert (ok);
> >
> > + vec[5] = constv;
> > + ix86_expand_int_vcond (vec);
> >
> > this also returns a bool you probably should assert true.
> >
>
> Yes, will change.
>
> > Otherwise thanks for tackling this.
> >
> > Richard.
> >
> > > gcc/ChangeLog:
> > >
> > > PR target/97194
> > > * config/i386/i386-expand.c (ix86_expand_vector_set_var): New
> > > function.
> > > * config/i386/i386-protos.h (ix86_expand_vector_set_var): New
> > > Decl.
> > > * config/i386/predicates.md (vec_setm_operand): New predicate,
> > > true for const_int_operand or register_operand under TARGET_AVX2.
> > > * config/i386/sse.md (vec_set<mode>): Support both constant
> > > and variable index vec_set.
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > > * gcc.target/i386/avx2-vec-set-1.c: New test.
> > > * gcc.target/i386/avx2-vec-set-2.c: New test.
> > > * gcc.target/i386/avx512bw-vec-set-1.c: New test.
> > > * gcc.target/i386/avx512bw-vec-set-2.c: New test.
> > > * gcc.target/i386/avx512f-vec-set-2.c: New test.
> > > * gcc.target/i386/avx512vl-vec-set-2.c: New test.
> > >
> > > --
> > > BR,
> > > Hongtao
>
>
>
> --
> BR,
> Hongtao
