Hi, > I am quoting my analysis from the PR. Could an aarch64 expert > pontificate here? > > This test is checking the final assembly for a specific sequence. I > don't speak aarch64 assembly, but the IL is different coming out of evrp.
The code currently generated is incorrect - you really need to preserve the AND. The issue seems that evrp doesn't seem to take CLZ_DEFINED_VALUE_AT_ZERO macros into account. When it is 2, the value of CLZ/CTZ is defined even in the mid-end and you need to include it in the range (so if the CLZ/CTZ value is the number of bits you should use ranges 0..32 and 0..64). Cheers, Wilco
