> -----Original Message-----
> From: Gcc-patches <gcc-patches-boun...@gcc.gnu.org> On Behalf Of
> Christophe Lyon via Gcc-patches
> Sent: 25 September 2020 11:35
> To: gcc Patches <gcc-patches@gcc.gnu.org>; Kyrill Tkachov
> <kyrylo.tkac...@foss.arm.com>
> Subject: testsuite: [aarch64] Fix aarch64/advsimd-intrinsics/v{trn, uzp,
> zip}_half.c
>
> Since r11-3402 (g:65c9878641cbe0ed898aa7047b7b994e9d4a5bb1), the
> vtrn_half, vuzp_half and vzip_half started failing with
>
> vtrn_half.c:76:17: error: redeclaration of 'vector_float64x2' with no linkage
> vtrn_half.c:77:17: error: redeclaration of 'vector2_float64x2' with no linkage
> vtrn_half.c:80:17: error: redeclaration of 'vector_res_float64x2' with
> no linkage
>
> This is because r11-3402 now always declares float64x2 variables for
> aarch64, leading to a duplicate declaration in these testcases.
>
> The fix is simply to remove these now useless declarations.
>
> These tests are skipped on arm*, so there is no impact on that target.
>
> 2020-09-25 Christophe Lyon <christophe.l...@linaro.org>
>
> gcc/testsuite/
> PR target/71233
> * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Remove
> declarations of vector, vector2, vector_res for float64x2 type.
> * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
> * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.
>
> OK?
Oops, yes ok.
Thank you for catching these,
Kyrill
