Hi! On Thu, Sep 10, 2020 at 07:18:01PM +0100, Richard Sandiford wrote:
<huge snip> > It's all a bit unfortunate really. Having different representations > for shifts inside and outside MEMs is the Second Great RTL Mistake. Yes... All targets with something that computes shifted addresses (like in a LEA style insn) needs to have that insn in two representations. Can this still be fixed? > (The first was modeless const_ints. :-)) I *like* those. Almost always. Stockholm syndrome? These days a mode on them should not cost much (in storage size). It should simplify quite some code, too. > If we do that, we should be able to remove the handling of > extract-based addresses in aarch64_classify_index & co. If we do what? I don't follow, sorry. (Patch to combine sounds fine fwiw; patches welcome, as always.) Segher
