Hello.

I really welcome the unification patch and I have some comments (ideas):

1)

+static inline int
+has_cpu_feature (struct __processor_model *cpu_model,
+              unsigned int *cpu_features2,
+              enum processor_features f)
+{
+  unsigned int i;
+  if (f < 32)
+    return cpu_model->__cpu_features[0] & (1U << (f & 31));
+  for (i = 0; i < SIZE_OF_CPU_FEATURES; i++)
+    if (f < (32 + 32 + i * 32))
+    return cpu_features2[i] & (1U << ((f - (32 + i * 32)) & 31));
+  gcc_unreachable ();
+}
+
+static inline void
+set_cpu_feature (struct __processor_model *cpu_model,
+              unsigned int *cpu_features2,
+              enum processor_features f)
+{
+  unsigned int i;
+  if (f < 32)
+    {
+      cpu_model->__cpu_features[0] |= (1U << (f & 31));
+      return;
+    }
+  for (i = 0; i < SIZE_OF_CPU_FEATURES; i++)
+    if (f < (32 + 32 + i * 32))
+      {
+     cpu_features2[i] |= (1U << ((f - (32 + i * 32)) & 31));
+     return;
+      }
+  gcc_unreachable ();
+}

Can you please add comment about the '32 + 32' and '32 + i * 32', it's unclear 
from the patch.

2) Can we remove all the:

+  unsigned int has_lahf_lm, has_sse4a;
+  unsigned int has_longmode, has_3dnowp, has_3dnow;
+  unsigned int has_movbe, has_sse4_1, has_sse4_2;
+  unsigned int has_popcnt, has_aes, has_avx, has_avx2;
+  unsigned int has_pclmul, has_abm, has_lwp;
+  unsigned int has_fma, has_fma4, has_xop;
+  unsigned int has_bmi, has_bmi2, has_tbm, has_lzcnt;

...

+  has_sse4a = has_feature (FEATURE_SSE4_A);
+  has_fma4 = has_feature (FEATURE_FMA4);
+  has_xop = has_feature (FEATURE_XOP);
+  has_fma = has_feature (FEATURE_FMA);

...

  if (arch)
    {
      const char *mmx = has_mmx ? " -mmmx" : " -mno-mmx";
      const char *mmx3dnow = has_3dnow ? " -m3dnow" : " -mno-3dnow";
      const char *sse = has_sse ? " -msse" : " -mno-sse";
...

      options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3,
                        sse4a, cx16, sahf, movbe, aes, sha, pclmul,
                        popcnt, abm, lwp, fma, fma4, xop, bmi, sgx, bmi2,
                        pconfig, wbnoinvd,
                        tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm,
                        hle, rdrnd, f16c, fsgsbase, rdseed, prfchw, adx,
                        fxsr, xsave, xsaveopt, avx512f, avx512er,
                        avx512cd, avx512pf, prefetchwt1, clflushopt,
                        xsavec, xsaves, avx512dq, avx512bw, avx512vl,
                        avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
                        clwb, mwaitx, clzero, pku, rdpid, gfni, shstk,
                        avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
                        avx512bitalg, avx512vpopcntdq, movdiri, movdir64b,
                        waitpkg, cldemote, ptwrite, avx512bf16, enqcmd,
                        avx512vp2intersect, serialize, tsxldtrk, NULL);

and instead mark flags in 'isa_names_table' that should be used for 
-match=native option emission.
We know names of the flags, their value (has_feature) and so we can generate 
that automatically?

3) Similarly we can we do automatically all the:

+  if (has_feature (FEATURE_AVX512VBMI2))
+    assert (__builtin_cpu_supports ("avx512vbmi2"));

We should have both information in 'isa_names_table'.

Thanks,
Martin

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