On Mon, May 4, 2020 at 12:58 AM Uros Bizjak <ubiz...@gmail.com> wrote:
>
> The part above is OK, but you are missing support for
> __attribute__((__target__("..."))). Please see how for example -msgx
> is handled in isa2_opts in i386-options.c and in
> gcc.target/i386/funcspec-56.h test source.
>
> Please repost the patch with added missing part.
>
> Uros.
Updated:
gcc/Changelog
* common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
* config.gcc: Add tsxldtrkintrin.h to extra_headers.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
TSXLDTRK.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__TSXLDTRK__.
* config/i386/i386-options.c (ix86_target_string): Add
-mtsxldtrk.
(ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
* config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
New.
* config/i386/i386.md (define_c_enum "unspec"): Add
UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
(TSXLDTRK): New define_int_iterator.
("<tsxldtrk>"): New define_insn.
* config/i386/i386.opt: Add -mtsxldtrk.
* config/i386/immintrin.h: Include tsxldtrkintrin.h.
* config/i386/tsxldtrkintrin.h: New.
* doc/invoke.texi: Document -mtsxldtrk.
gcc/testsuite/Changelog
* g++.dg/other/i386-2.c: Add -mtsxldtrk.
* g++.dg/other/i386-3.c: Likewise.
* gcc.target/i386/sse-12.c: Likewise.
* gcc.target/i386/sse-13.c: Likewise.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-22.c: Likewsie.
* gcc.target/i386/sse-23.c: Likewise.
* gcc.target/i386/tsxldtrk-1.c: New test.
* gcc.target/i386/funcspec-56.inc: Add target attribute tests
for tsxldtrk.
--
BR,
Hongtao
From b6adade2e5c30f23e4472df4dc76a6edcb69a495 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao....@intel.com>
Date: Fri, 14 Feb 2020 15:40:46 +0800
Subject: [PATCH] Enable TARGET_TSXLDTRK for GCC support.
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
* config.gcc: Add tsxldtrkintrin.h to extra_headers.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
TSXLDTRK.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__TSXLDTRK__.
* config/i386/i386-options.c (ix86_target_string): Add
-mtsxldtrk.
(ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
* config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
New.
* config/i386/i386.md (define_c_enum "unspec"): Add
UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
(TSXLDTRK): New define_int_iterator.
("<tsxldtrk>"): New define_insn.
* config/i386/i386.opt: Add -mtsxldtrk.
* config/i386/immintrin.h: Include tsxldtrkintrin.h.
* config/i386/tsxldtrkintrin.h: New.
* doc/invoke.texi: Document -mtsxldtrk.
gcc/testsuite/
* g++.dg/other/i386-2.c: Add -mtsxldtrk.
* g++.dg/other/i386-3.c: Likewise.
* gcc.target/i386/sse-12.c: Likewise.
* gcc.target/i386/sse-13.c: Likewise.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-22.c: Likewsie.
* gcc.target/i386/sse-23.c: Likewise.
* gcc.target/i386/tsxldtrk-1.c: New test.
* gcc.target/i386/funcspec-56.inc: Add target attribute tests
for tsxldtrk.
---
gcc/common/config/i386/i386-common.c | 15 +++++++++
gcc/config.gcc | 6 ++--
gcc/config/i386/cpuid.h | 2 ++
gcc/config/i386/driver-i386.c | 4 +++
gcc/config/i386/i386-builtin.def | 4 +++
gcc/config/i386/i386-c.c | 2 ++
gcc/config/i386/i386-options.c | 4 ++-
gcc/config/i386/i386.h | 2 ++
gcc/config/i386/i386.md | 15 +++++++++
gcc/config/i386/i386.opt | 4 +++
gcc/config/i386/immintrin.h | 2 ++
gcc/config/i386/tsxldtrkintrin.h | 33 +++++++++++++++++++
gcc/doc/invoke.texi | 5 ++-
gcc/testsuite/g++.dg/other/i386-2.C | 4 +--
gcc/testsuite/g++.dg/other/i386-3.C | 4 +--
gcc/testsuite/gcc.target/i386/funcspec-56.inc | 2 ++
gcc/testsuite/gcc.target/i386/sse-12.c | 2 +-
gcc/testsuite/gcc.target/i386/sse-13.c | 2 +-
gcc/testsuite/gcc.target/i386/sse-14.c | 2 +-
gcc/testsuite/gcc.target/i386/sse-22.c | 6 ++--
gcc/testsuite/gcc.target/i386/sse-23.c | 4 +--
gcc/testsuite/gcc.target/i386/tsxldtrk-1.c | 13 ++++++++
22 files changed, 121 insertions(+), 16 deletions(-)
create mode 100644 gcc/config/i386/tsxldtrkintrin.h
create mode 100644 gcc/testsuite/gcc.target/i386/tsxldtrk-1.c
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index 02b19f1bb54..207651c3222 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -158,6 +158,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA2_WAITPKG_SET OPTION_MASK_ISA2_WAITPKG
#define OPTION_MASK_ISA2_CLDEMOTE_SET OPTION_MASK_ISA2_CLDEMOTE
#define OPTION_MASK_ISA2_ENQCMD_SET OPTION_MASK_ISA2_ENQCMD
+#define OPTION_MASK_ISA2_TSXLDTRK_SET OPTION_MASK_ISA2_TSXLDTRK
/* Define a set of ISAs which aren't available when a given ISA is
disabled. MMX and SSE ISAs are handled separately. */
@@ -242,6 +243,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA2_CLDEMOTE_UNSET OPTION_MASK_ISA2_CLDEMOTE
#define OPTION_MASK_ISA2_ENQCMD_UNSET OPTION_MASK_ISA2_ENQCMD
#define OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET OPTION_MASK_ISA2_AVX512VP2INTERSECT
+#define OPTION_MASK_ISA2_TSXLDTRK_UNSET OPTION_MASK_ISA2_TSXLDTRK
/* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
as -mno-sse4.1. */
@@ -900,6 +902,19 @@ ix86_handle_option (struct gcc_options *opts,
}
return true;
+ case OPT_mtsxldtrk:
+ if (value)
+ {
+ opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_TSXLDTRK_SET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_TSXLDTRK_SET;
+ }
+ else
+ {
+ opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_TSXLDTRK_UNSET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_TSXLDTRK_UNSET;
+ }
+ return true;
+
case OPT_mfma:
if (value)
{
diff --git a/gcc/config.gcc b/gcc/config.gcc
index cf1a87e2efd..5af1b12085a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -413,7 +413,8 @@ i[34567]86-*-*)
avx512vpopcntdqvlintrin.h avx512bitalgintrin.h
pconfigintrin.h wbnoinvdintrin.h movdirintrin.h
waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h avx512bf16intrin.h
- enqcmdintrin.h avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h"
+ enqcmdintrin.h avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
+ tsxldtrkintrin.h"
;;
x86_64-*-*)
cpu_type=i386
@@ -446,7 +447,8 @@ x86_64-*-*)
avx512vpopcntdqvlintrin.h avx512bitalgintrin.h
pconfigintrin.h wbnoinvdintrin.h movdirintrin.h
waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h avx512bf16intrin.h
- enqcmdintrin.h avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h"
+ enqcmdintrin.h avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
+ tsxldtrkintrin.h"
;;
ia64-*-*)
extra_headers=ia64intrin.h
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index 34a7956d36a..33036ca2d08 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -122,6 +122,8 @@
#define bit_AVX512VP2INTERSECT (1 << 8)
#define bit_IBT (1 << 20)
#define bit_PCONFIG (1 << 18)
+#define bit_TSXLDTRK (1 << 16)
+
/* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
#define bit_BNDREGS (1 << 3)
#define bit_BNDCSR (1 << 4)
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 130e12c8868..56c279e8cb6 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -429,6 +429,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_waitpkg = 0;
unsigned int has_cldemote = 0;
unsigned int has_avx512bf16 = 0;
+ unsigned int has_tsxldtrk = 0;
unsigned int has_ptwrite = 0;
@@ -534,6 +535,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_avx5124vnniw = edx & bit_AVX5124VNNIW;
has_avx5124fmaps = edx & bit_AVX5124FMAPS;
has_avx512vp2intersect = edx & bit_AVX512VP2INTERSECT;
+ has_tsxldtrk = edx & bit_TSXLDTRK;
has_shstk = ecx & bit_SHSTK;
has_pconfig = edx & bit_PCONFIG;
@@ -1155,6 +1157,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
const char *vaes = has_vaes ? " -mvaes" : " -mno-vaes";
const char *vpclmulqdq = has_vpclmulqdq ? " -mvpclmulqdq" : " -mno-vpclmulqdq";
const char *avx512vp2intersect = has_avx512vp2intersect ? " -mavx512vp2intersect" : " -mno-avx512vp2intersect";
+ const char *tsxldtrk = has_tsxldtrk ? " -mtsxldtrk " : " -mno-tsxldtrk";
const char *avx512bitalg = has_avx512bitalg ? " -mavx512bitalg" : " -mno-avx512bitalg";
const char *movdiri = has_movdiri ? " -mmovdiri" : " -mno-movdiri";
const char *movdir64b = has_movdir64b ? " -mmovdir64b" : " -mno-movdir64b";
@@ -1178,6 +1181,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
avx512bitalg, movdiri, movdir64b, waitpkg, cldemote,
ptwrite, avx512bf16, enqcmd, avx512vp2intersect,
+ tsxldtrk,
NULL);
}
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 4d5863ce0aa..6f11b76ec6f 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -446,6 +446,10 @@ BDESC (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_PTWRITE, CODE_FOR_ptwritedi, "__b
BDESC (0, OPTION_MASK_ISA2_ENQCMD, CODE_FOR_nothing, "__builtin_ia32_enqcmd", IX86_BUILTIN_ENQCMD, UNKNOWN, (int) INT_FTYPE_PVOID_PCVOID)
BDESC (0, OPTION_MASK_ISA2_ENQCMD, CODE_FOR_nothing, "__builtin_ia32_enqcmds", IX86_BUILTIN_ENQCMDS, UNKNOWN, (int) INT_FTYPE_PVOID_PCVOID)
+/* TSXLDTRK */
+BDESC (0, OPTION_MASK_ISA2_TSXLDTRK, CODE_FOR_xsusldtrk, "__builtin_ia32_xsusldtrk", IX86_BUILTIN_XSUSLDTRK, UNKNOWN, (int) VOID_FTYPE_VOID)
+BDESC (0, OPTION_MASK_ISA2_TSXLDTRK, CODE_FOR_xresldtrk, "__builtin_ia32_xresldtrk", IX86_BUILTIN_XRESLDTRK, UNKNOWN, (int) VOID_FTYPE_VOID)
+
BDESC_END (SPECIAL_ARGS, ARGS)
/* Builtins with variable number of arguments. */
diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index 21ed7f4e99f..fc90fb1f16d 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -569,6 +569,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__MMX_WITH_SSE__");
if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
def_or_undef (parse_in, "__ENQCMD__");
+ if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
+ def_or_undef (parse_in, "__TSXLDTRK__");
if (TARGET_IAMCU)
{
def_or_undef (parse_in, "__iamcu");
diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c
index 5c21fce06a4..7e21ef4a660 100644
--- a/gcc/config/i386/i386-options.c
+++ b/gcc/config/i386/i386-options.c
@@ -205,7 +205,8 @@ static struct ix86_target_opts isa2_opts[] =
{ "-mcldemote", OPTION_MASK_ISA2_CLDEMOTE },
{ "-mptwrite", OPTION_MASK_ISA2_PTWRITE },
{ "-mavx512bf16", OPTION_MASK_ISA2_AVX512BF16 },
- { "-menqcmd", OPTION_MASK_ISA2_ENQCMD }
+ { "-menqcmd", OPTION_MASK_ISA2_ENQCMD },
+ { "-mtsxldtrk", OPTION_MASK_ISA2_TSXLDTRK }
};
static struct ix86_target_opts isa_opts[] =
{
@@ -1017,6 +1018,7 @@ ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
IX86_ATTR_ISA ("ptwrite", OPT_mptwrite),
IX86_ATTR_ISA ("avx512bf16", OPT_mavx512bf16),
IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
+ IX86_ATTR_ISA ("tsxldtrk", OPT_mtsxldtrk),
/* enum options */
IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 08245f64322..08ea1c62b5b 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -199,6 +199,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define TARGET_AVX512BF16_P(x) TARGET_ISA2_AVX512BF16_P(x)
#define TARGET_ENQCMD TARGET_ISA2_ENQCMD
#define TARGET_ENQCMD_P(x) TARGET_ISA2_ENQCMD_P(x)
+#define TARGET_TSXLDTRK TARGET_ISA2_TSXLDTRK
+#define TARGET_TSXLDTRK_P(x) TARGET_ISA2_TSXLDTRK_P(x)
#define TARGET_LP64 TARGET_ABI_64
#define TARGET_LP64_P(x) TARGET_ABI_64_P(x)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 898bb946a2d..b9346f2d0ba 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -284,6 +284,10 @@
UNSPECV_MOVDIRI
UNSPECV_MOVDIR64B
+ ;; For TSXLDTRK support
+ UNSPECV_XSUSLDTRK
+ UNSPECV_XRESLDTRK
+
;; For WAITPKG support
UNSPECV_UMWAIT
UNSPECV_UMONITOR
@@ -21155,6 +21159,17 @@
"movdir64b\t{%1, %0|%0, %1}"
[(set_attr "type" "other")])
+;; TSXLDTRK
+(define_int_iterator TSXLDTRK [UNSPECV_XSUSLDTRK UNSPECV_XRESLDTRK])
+(define_int_attr tsxldtrk [(UNSPECV_XSUSLDTRK "xsusldtrk")
+ (UNSPECV_XRESLDTRK "xresldtrk")])
+(define_insn "<tsxldtrk>"
+ [(unspec_volatile [(const_int 0)] TSXLDTRK)]
+ "TARGET_TSXLDTRK"
+ "<tsxldtrk>"
+ [(set_attr "type" "other")
+ (set_attr "length" "4")])
+
;; ENQCMD and ENQCMDS
(define_int_iterator ENQCMD [UNSPECV_ENQCMD UNSPECV_ENQCMDS])
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 185a1d0686b..d5033f44131 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -1107,3 +1107,7 @@ AVX512BF16 built-in functions and code generation.
menqcmd
Target Report Mask(ISA2_ENQCMD) Var(ix86_isa_flags2) Save
Support ENQCMD built-in functions and code generation.
+
+mtsxldtrk
+Target Report Mask(ISA2_TSXLDTRK) Var(ix86_isa_flags2) Save
+Support TSXLDTRK built-in functions and code generation.
diff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.h
index 12b118b0861..06a77eaacbc 100644
--- a/gcc/config/i386/immintrin.h
+++ b/gcc/config/i386/immintrin.h
@@ -140,6 +140,8 @@
#include <enqcmdintrin.h>
+#include <tsxldtrkintrin.h>
+
#include <rdseedintrin.h>
#include <prfchwintrin.h>
diff --git a/gcc/config/i386/tsxldtrkintrin.h b/gcc/config/i386/tsxldtrkintrin.h
new file mode 100644
index 00000000000..08b76a9c40f
--- /dev/null
+++ b/gcc/config/i386/tsxldtrkintrin.h
@@ -0,0 +1,33 @@
+#if !defined _IMMINTRIN_H_INCLUDED
+#error "Never use <tsxldtrkintrin.h> directly; include <immintrin.h> instead."
+#endif
+
+#ifndef _TSXLDTRKINTRIN_H_INCLUDED
+#define _TSXLDTRKINTRIN_H_INCLUDED
+
+#if !defined(__TSXLDTRK__)
+#pragma GCC push_options
+#pragma GCC target("tsxldtrk")
+#define __DISABLE_TSXLDTRK__
+#endif /* __TSXLDTRK__ */
+
+extern __inline void
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_xsusldtrk (void)
+{
+ __builtin_ia32_xsusldtrk ();
+}
+
+extern __inline void
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_xresldtrk (void)
+{
+ __builtin_ia32_xresldtrk ();
+}
+
+#ifdef __DISABLE_TSXLDTRK__
+#undef __DISABLE_TSXLDTRK__
+#pragma GCC pop_options
+#endif /* __DISABLE_TSXLDTRK__ */
+
+#endif /* _TSXLDTRKINTRIN_H_INCLUDED */
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 767d1f07801..8457ca1698a 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1344,7 +1344,7 @@ See RS/6000 and PowerPC Options.
-mshstk -mmanual-endbr -mforce-indirect-call -mavx512vbmi2 -mavx512bf16 -menqcmd @gol
-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq @gol
-mavx5124fmaps -mavx512vnni -mavx5124vnniw -mprfchw -mrdpid @gol
--mrdseed -msgx -mavx512vp2intersect@gol
+-mrdseed -msgx -mavx512vp2intersect -mtsxldtrk@gol
-mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops @gol
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
-mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol
@@ -29468,6 +29468,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@itemx -menqcmd
@opindex menqcmd
@need 200
+@itemx -mtsxldtrk
+@opindex mtsxldtrk
+@need 200
@itemx -mavx512vpopcntdq
@opindex mavx512vpopcntdq
@need 200
diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C
index 95314157170..f5544d99790 100644
--- a/gcc/testsuite/g++.dg/other/i386-2.C
+++ b/gcc/testsuite/g++.dg/other/i386-2.C
@@ -1,11 +1,11 @@
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
+/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mtsxldtrk" } */
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h,
avx5124vnniwintrin.h, avx512vpopcntdqintrin.h gfniintrin.h
- avx512bitalgintrin.h, avx512vp2intersectintrin.h,
+ avx512bitalgintrin.h, avx512vp2intersectintrin.h, tsxldtrkintrin.h,
avx512vp2intersectvlintrin.h and mm_malloc.h.h are usable
with -O -pedantic-errors. */
diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C
index 4912e7f40d1..7e3b9cc6d11 100644
--- a/gcc/testsuite/g++.dg/other/i386-3.C
+++ b/gcc/testsuite/g++.dg/other/i386-3.C
@@ -1,11 +1,11 @@
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
+/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mtsxldtrk" } */
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h,
avx5124vnniwintrin.h, avx512vpopcntdqintrin.h gfniintrin.h
- avx512bitalgintrin.h, avx512vp2intersectintrin.h,
+ avx512bitalgintrin.h, avx512vp2intersectintrin.h, tsxldtrkintrin.h,
avx512vp2intersectvlintrin.h and mm_malloc.h are usable
with -O -fkeep-inline-functions. */
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
index 200d27220df..95c145edbd3 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
+++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
@@ -66,6 +66,7 @@ extern void test_clwb (void) __attribute__((__target__("clwb")));
extern void test_cld (void) __attribute__((__target__("cld")));
extern void test_recip (void) __attribute__((__target__("recip")));
+extern void test_tsxldtrk (void) __attribute__((__target__("tsxldtrk")));
extern void test_no_sgx (void) __attribute__((__target__("no-sgx")));
extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps")));
@@ -133,6 +134,7 @@ extern void test_no_clwb (void) __attribute__((__target__("no-clwb")));
extern void test_no_cld (void) __attribute__((__target__("no-cld")));
extern void test_no_recip (void) __attribute__((__target__("no-recip")));
+extern void test_no_tsxldtrk (void) __attribute__((__target__("no-tsxldtrk")));
extern void test_arch_nocona (void) __attribute__((__target__("arch=nocona")));
extern void test_arch_core2 (void) __attribute__((__target__("arch=core2")));
diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c
index 6be531d88bf..78013460334 100644
--- a/gcc/testsuite/gcc.target/i386/sse-12.c
+++ b/gcc/testsuite/gcc.target/i386/sse-12.c
@@ -3,7 +3,7 @@
popcntintrin.h gfniintrin.h and mm_malloc.h are usable
with -O -std=c89 -pedantic-errors. */
/* { dg-do compile } */
-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
+/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mtsxldtrk" } */
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index c2b192d72f6..914e27238c0 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd" } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mtsxldtrk" } */
/* { dg-add-options bind_pic_locally } */
#include <mm_malloc.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
index 0d2b8b3cba0..2cf2a0daabf 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
+/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mtsxldtrk" } */
/* { dg-add-options bind_pic_locally } */
#include <mm_malloc.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c
index 9be7f2d5a58..b0e404e74b3 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -8,7 +8,7 @@
/* Test that the intrinsics compile with optimization. All of them
are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h,
mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h,
- tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h,
+ tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, tsxldtrkintrin.h,
avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h,
avx512bitalgintrin.h, avx512vp2intersectintrin.h,
avx512vp2intersectvlintrin.h and mm_malloc.h that reference the proper
@@ -102,7 +102,7 @@
#ifndef DIFFERENT_PRAGMAS
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect")
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,tsxldtrk")
#endif
/* Following intrinsics require immediate arguments. They
@@ -219,7 +219,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1)
/* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */
#ifdef DIFFERENT_PRAGMAS
-#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect")
+#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,tsxldtrk")
#endif
#include <immintrin.h>
test_1 (_cvtss_sh, unsigned short, float, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c
index e98c7693ef7..1edbd6f5997 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -7,7 +7,7 @@
/* Test that the intrinsics compile with optimization. All of them
are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h,
mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h,
- tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h,
+ tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, tsxtrkintrin.h,
avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h,
avx512bitalgintrin.h, avx512vp2intersectintrin.h,
avx512vp2intersectvlintrin.h and mm_malloc.h that reference the proper
@@ -697,6 +697,6 @@
#define __builtin_ia32_vpclmulqdq_v2di(A, B, C) __builtin_ia32_vpclmulqdq_v2di(A, B, 1)
#define __builtin_ia32_vpclmulqdq_v8di(A, B, C) __builtin_ia32_vpclmulqdq_v8di(A, B, 1)
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect")
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,tsxldtrk")
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/tsxldtrk-1.c b/gcc/testsuite/gcc.target/i386/tsxldtrk-1.c
new file mode 100644
index 00000000000..c197b9f1143
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/tsxldtrk-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtsxldtrk" } */
+/* { dg-final { scan-assembler "xsusldtrk" } } */
+/* { dg-final { scan-assembler "xresldtrk" } } */
+
+#include <immintrin.h>
+
+void
+foo (void)
+{
+ _xsusldtrk ();
+ _xresldtrk ();
+}
--
2.18.1
