[committed] Fix length of H8/SX multiply patterns

[Jeff Law via Gcc-patches]

This is a minor H8 specific bugfix.  The H8/SX multiply instructions are all 4
bytes in length, but the machine description claims they are 2 bytes in length.

This can cause GCC to emit a short branch when a long branch was actually 
needed.
Sadly the assembler didn't complain and instead the branch goes to the wrong
place and all hell breaks loose when you try to execute the code.

My tester tripped over this while testing the H8 port.

Committed to the trunk.

Jeff



commit b3346399a245e9f262792f76f67f8e2dfa7e064c
Author: Jeff Law <l...@torsion.usersys.redhat.com>
Date:   Tue Apr 28 16:34:45 2020 -0400

    Fix some testsuite failures for H8/SX multilibs where short branches
    where used when long branches were necessary.
    
            * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
            multiply patterns are 4 bytes long.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 905d2b8a2f5..9c947299964 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-04-28  Jeff Law  <l...@redhat.com>
+
+       * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
+       multiply patterns are 4 bytes long.
+
 2020-04-28  Kyrylo Tkachov  <kyrylo.tkac...@arm.com>
 
        * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index fdd2d8b02d7..3e5cdbeeebe 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -1146,7 +1146,7 @@
                  (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))]
   "TARGET_H8300SX"
   { return <MODE>mode == HImode ? "muls.w\\t%T2,%T0" : "muls.l\\t%S2,%S0"; }
-  [(set_attr "length" "2")
+  [(set_attr "length" "4")
    (set_attr "cc" "set_zn")])
 
 (define_insn "smulsi3_highpart"
@@ -1159,7 +1159,7 @@
          (const_int 32))))]
   "TARGET_H8300SXMUL"
   "muls/u.l\\t%S2,%S0"
-  [(set_attr "length" "2")
+  [(set_attr "length" "4")
    (set_attr "cc" "set_zn")])
 
 (define_insn "umulsi3_highpart"
@@ -1172,7 +1172,7 @@
            (const_int 32))))]
   "TARGET_H8300SX"
   "mulu/u.l\\t%S2,%S0"
-  [(set_attr "length" "2")
+  [(set_attr "length" "4")
    (set_attr "cc" "none_0hit")])
 
 ;; This is a "bridge" instruction.  Combine can't cram enough insns