Even though ix86_hard_regno_mode_ok doesn't allow xmm16-xmm31 nor
ymm16-ymm31 in 128/256 bit modes when AVX512VL is disabled, reload
can still generate reg to reg moves with xmm16-xmm31 and ymm16-ymm31
in 128/256 bit modes. Remove mode size check in ix86_get_ssemov.
gcc/
PR target/94561
* config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
gcc/testsuite/
PR target/94561
* gcc.target/i386/pr94561.c: New test.
---
gcc/config/i386/i386.c | 10 +++----
gcc/testsuite/gcc.target/i386/pr94561.c | 36 +++++++++++++++++++++++++
2 files changed, 41 insertions(+), 5 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr94561.c
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ca3b7dc06c2..d88f5127d11 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4969,12 +4969,12 @@ ix86_get_ssemov (rtx *operands, unsigned size,
&& !TARGET_AVX512VL
&& GET_MODE_SIZE (mode) < 64)
{
- /* NB: Since ix86_hard_regno_mode_ok only allows xmm16-xmm31 or
- ymm16-ymm31 in 128/256 bit modes when AVX512VL is enabled,
- we get here only for xmm16-xmm31 or ymm16-ymm31 in 32/64 bit
+ /* NB: Even though ix86_hard_regno_mode_ok doesn't allow
+ xmm16-xmm31 nor ymm16-ymm31 in 128/256 bit modes when
+ AVX512VL is disabled, reload can still generate reg to
+ reg moves with xmm16-xmm31 and ymm16-ymm31 in 128/256 bit
modes. */
- if (GET_MODE_SIZE (mode) >= 16
- || memory_operand (operands[0], mode)
+ if (memory_operand (operands[0], mode)
|| memory_operand (operands[1], mode))
gcc_unreachable ();
size = 64;
diff --git a/gcc/testsuite/gcc.target/i386/pr94561.c
b/gcc/testsuite/gcc.target/i386/pr94561.c
new file mode 100644
index 00000000000..49fdf7e687d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr94561.c
@@ -0,0 +1,36 @@
+/* PR target/94561 */
+/* { dg-do compile } */
+/* { dg-options "-march=knl -O3 -funroll-loops" } */
+
+struct xi {
+ long int mg;
+ int lx;
+};
+
+struct xi *di;
+int *eu;
+
+void
+he (void);
+
+int
+m8 (int we, int i8)
+{
+ int wd, cj = 0;
+
+ for (wd = 0; wd < 80; ++wd)
+ {
+ if (di->mg == 0 && (eu[wd] | !!we) == 0 && di->lx == 0)
+ continue;
+
+ if (i8 == 0)
+ he ();
+
+ ++cj;
+ }
+
+ return cj;
+}
+
+/* { dg-final { scan-assembler-not "vmov\[^\n\r]*%\[xy\]mm1\[6-9\].*" } } */
+/* { dg-final { scan-assembler-not "vmov\[^\n\r]*%\[xy\]mm\[23\]\[0-9\].*" } }
*/
--
2.25.2
