On Fri, 2020-03-27 at 00:46 +0100, Jakub Jelinek wrote:
> Hi!
>
> This define_insn has two issues.
> One is that with -mavx512f -mno-avx512vl it can emit an AVX512VL-only insn
> - 128-bit or 256-bit EVEX encoded vpternlog{d,q}.
> Another one is that because there is no vpternlog{b,w}, we emit vpternlogd
> instead, but then we shouldn't pretend we support masking of that, because
> we don't.
> The first one can be fixed by forcing the use of %zmm* registers instead of
> %xmm* or %ymm* if AVX512F but not AVX512VL, like we do for a couple of other
> insns (although that is primarily done in order to support %xmm16+ regs).
> But we need to make sure that in that case the input operand isn't memory,
> because while we can read and store the higher bits of registers, we don't
> want to read from memory more bytes than what we should read.
>
> A variant to these two if_then_else set attrs, condition in the output and
> larger condition would be 4 different define_insns (one with something like
> VI48_AVX512VL iterator, masking, no g modifiers and "vm" input constraint,
> another one with VI48_AVX iterator, !TARGET_AVX512VL in condition,
> no masking, g modifiers and "v" input constraint, one with VI12_AVX512VL
> iterator, no masking, no g modifiers and "vm" input constraint and last one
> with
> VI12_AVX2 iterator, !TARGET_AVX512VL in condition, no masking, g modifiers
> and "v" input constraint, but I think having one pattern is shorter than
> that.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2020-03-26 Jakub Jelinek <ja...@redhat.com>
>
> PR target/94343
> * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
> !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
> operand is a register. Don't enable masked variants for V*[QH]Imode.
>
> * gcc.target/i386/avx512f-pr94343.c: New test.
> * gcc.target/i386/avx512vl-pr94343.c: New test.
OK
jeff
