On 13 Dec 2011, at 01:16, Richard Henderson wrote:
One more try for ppc-linux plus ppc-darwin.
I've taken care of the CALL thing and the register naming thing
since last attempt.
works for me - modulo a couple of typos - probably already fixed in...
git://repo.or.cz/gcc/rth.git rth/tm-next
... but I haven't got a chance to check that out and rebuild this
morning..
cheers
Iain
--- libitm/config/powerpc/sjlj.S 2011-12-13 09:38:38.000000000 +0000
+++ libitm/config/powerpc/sjlj.S-iain 2011-12-13 09:30:47.000000000 +0000
@@ -79,7 +79,7 @@ _$0:
# ifdef __ppc64__
.machine ppc64
# else
- .macrhine ppc7400
+ .machine ppc7400
# endif
#else
#error "unsupported system"
@@ -162,7 +162,7 @@ FUNC _ITM_beginTransaction
stregu r(1), -FRAME(r(1))
cfi_def_cfa_offset(FRAME)
cfi_offset(65, LR_SAVE)
- streg r(11), OFS_CFA(r(4))
+ streg r(6), OFS_CFA(r(4))
streg r(0), OFS_LR(r(4))
#ifdef _CALL_DARWIN
streg r(13), OFS_TOC(r(4))
@@ -219,8 +219,8 @@ FUNC _ITM_beginTransaction
/* ??? Determine when VRs not present. */
/* ??? Test r(3) for pr_hasNoVectorUpdate and skip the vr save.
This is not yet set by the compiler. */
- addi r(5), r(1), OFS_VR
- addi r(6), r(1), OFS_VR+16
+ addi r(5), r(4), OFS_VR
+ addi r(6), r(4), OFS_VR+16
mfspr r(0), VRSAVE
stvx v(20), 0, r(5)
addi r(5), r(5), 32
@@ -281,16 +281,26 @@ FUNC GTM_longjmp
cfi_undefined(v(29))
cfi_undefined(v(30))
cfi_undefined(v(31))
- lvx v(20), 0, r(6); addi r(6), r(6), 32
- lvx v(21), 0, r(7); addi r(7), r(7), 32
- lvx v(22), 0, r(6); addi r(6), r(6), 32
- lvx v(23), 0, r(7); addi r(7), r(7), 32
- lvx v(24), 0, r(6); addi r(6), r(6), 32
- lvx v(25), 0, r(7); addi r(7), r(7), 32
- lvx v(26), 0, r(6); addi r(6), r(6), 32
- lvx v(27), 0, r(7); addi r(7), r(7), 32
- lvx v(28), 0, r(6); addi r(6), r(6), 32
- lvx v(29), 0, r(7); addi r(7), r(7), 32
+ lvx v(20), 0, r(6)
+ addi r(6), r(6), 32
+ lvx v(21), 0, r(7)
+ addi r(7), r(7), 32
+ lvx v(22), 0, r(6)
+ addi r(6), r(6), 32
+ lvx v(23), 0, r(7)
+ addi r(7), r(7), 32
+ lvx v(24), 0, r(6)
+ addi r(6), r(6), 32
+ lvx v(25), 0, r(7)
+ addi r(7), r(7), 32
+ lvx v(26), 0, r(6)
+ addi r(6), r(6), 32
+ lvx v(27), 0, r(7)
+ addi r(7), r(7), 32
+ lvx v(28), 0, r(6)
+ addi r(6), r(6), 32
+ lvx v(29), 0, r(7)
+ addi r(7), r(7), 32
lvx v(30), 0, r(6)
lvx v(31), 0, r(7)
mtspr VRSAVE, r(0)
