On Mon, 2020-02-03 at 12:38 +0100, Claudiu Zissulescu wrote: > TARGET_INSN_COST gives us a better control over the instruction costs > than classical RTX_COSTS. A simple cost scheme is in place for the > time being, when optimizing for size, the cost is given by the > instruction length. When optimizing for speed, the cost is 1 for any > recognized instruction, and 2 for any load/store instruction. The > latter one can be overwritten by using cost attribute for an > instruction. Due to this change, we need to update also a number of > instruction patterns with a new predicate to better reflect the costs. > > gcc/ > xxxx-xx-xx Claudiu Zissulescu <claz...@synopsys.com> > > * config/arc/arc.c (arc_insn_cost): New function. > (TARGET_INSN_COST): Define. > * config/arc/arc.md (cost): New attribute. > (add_n): Use arc_nonmemory_operand. > (ashlsi3_insn): Likewise, also update constraints. > (ashrsi3_insn): Likewise. > (rotrsi3): Likewise. > (add_shift): Likewise. > * config/arc/predicates.md (arc_nonmemory_operand): New predicate. > > testsuite/ > xxxx-xx-xx Claudiu Zissulescu <claz...@synopsys.com> > > * gcc.target/arc/or-cnst-size2.c: Update test. My only worry would be asking for the length early in the RTL pipeline may not be as accurate, but it's supposed to work, so if you're comfortable with the end results, then OK.
jeff >
