<apin...@marvell.com> writes: > From: Andrew Pinski <apin...@marvell.com> > > Like I mentioned in https://gcc.gnu.org/ml/gcc/2020-01/msg00157.html, > The shift by a register should be just COSTS_N_INSNS (1) rather than > COSTS_N_INSNS (2). This allows lshift_cheap_p to return true now > and converting switches to be using shift and other like > structures. I noticed this difference when I was working > through PR 93131 and understanding what reassoc could handle. > > OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
OK, thanks. (Sorry for the slow response. It turned out that our servers bounced some gcc-patches emails from the git switchover weekend, so I didn't see this till now.) Richard > > Thanks, > Andrew Pinski > > ChangeLog: > * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change > alu.shift_reg to 0. > --- > gcc/config/arm/aarch-cost-tables.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/gcc/config/arm/aarch-cost-tables.h > b/gcc/config/arm/aarch-cost-tables.h > index 6a30d92cde9..cf818659901 100644 > --- a/gcc/config/arm/aarch-cost-tables.h > +++ b/gcc/config/arm/aarch-cost-tables.h > @@ -235,7 +235,7 @@ const struct cpu_cost_table cortexa57_extra_costs = > 0, /* arith. */ > 0, /* logical. */ > 0, /* shift. */ > - COSTS_N_INSNS (1), /* shift_reg. */ > + 0, /* shift_reg. */ > COSTS_N_INSNS (1), /* arith_shift. */ > COSTS_N_INSNS (1), /* arith_shift_reg. */ > COSTS_N_INSNS (1), /* log_shift. */
