On Fri, Jan 10, 2020 at 1:45 PM Richard Sandiford
<richard.sandif...@arm.com> wrote:
>
> The related_vector_mode series missed this case in
> vect_create_epilog_for_reduction, where we want to create the
> unsigned integer equivalent of another vector. Without it we
> could mix SVE and Advanced SIMD vectors in the same operation.
>
> This showed up on existing tests when testing with fixed-length
> -msve-vector-bits=128.
>
> Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
OK.
Richard.
> Richard
>
>
> 2020-01-10 Richard Sandiford <richard.sandif...@arm.com>
>
> gcc/
> * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
> get_related_vectype_for_scalar_type rather than build_vector_type
> to create the index type for a conditional reduction.
>
> Index: gcc/tree-vect-loop.c
> ===================================================================
> --- gcc/tree-vect-loop.c 2020-01-10 12:37:58.683829420 +0000
> +++ gcc/tree-vect-loop.c 2020-01-10 12:44:20.021356977 +0000
> @@ -4566,8 +4566,9 @@ vect_create_epilog_for_reduction (stmt_v
> int scalar_precision
> = GET_MODE_PRECISION (SCALAR_TYPE_MODE (TREE_TYPE (vectype)));
> tree cr_index_scalar_type = make_unsigned_type (scalar_precision);
> - tree cr_index_vector_type = build_vector_type
> - (cr_index_scalar_type, TYPE_VECTOR_SUBPARTS (vectype));
> + tree cr_index_vector_type = get_related_vectype_for_scalar_type
> + (TYPE_MODE (vectype), cr_index_scalar_type,
> + TYPE_VECTOR_SUBPARTS (vectype));
>
> /* First we create a simple vector induction variable which starts
> with the values {1,2,3,...} (SERIES_VECT) and increments by the
