My fix to PR92923 seems to have caused the vmx/ops.c and vsx-vector-6.p*.c
test failures. The ops.c issue is we need a new option to quiet a warning
we didn't see when we were emitting VIEW_CONVERT_EXPRs. The other test
cases just need a slight adjustment to some of their counts. However, we
were seeing double/triple/... counting due to using "xxland" instead of
{\mxxland\M} for our regex, so that was also counting xxlandc too.
I adjusted all of the insn regexs to use \m and \M to fix that.
I must say that the vsx-vector-6.p*.c tests are fragile! They're so big and
reusing source operands, that the compiler can sometimes optimize several
builtin calls together, meaning we don't see as many vsx instructions as
we have calls to builtins. I didn't bother trying to fix that, since that
is a lot more work! I just wanted to vent! :-)
I've confirmed the updated test cases now pass on both BE and LE.
Ok for trunk?
Peter
PR target/92923
PR target/93136
* gcc.dg/vmx/ops.c: Add -flax-vector-conversions to dg-options.
* gcc.target/powerpc/vsx-vector-6.p7.c: Adjust scan-assembler-times
regex directives. Adjust expected instruction counts.
* gcc.target/powerpc/vsx-vector-6.p8.c: Likewise.
* gcc.target/powerpc/vsx-vector-6.p9.c: Likewise.
Index: gcc/testsuite/gcc.dg/vmx/ops.c
===================================================================
--- gcc/testsuite/gcc.dg/vmx/ops.c (revision 279852)
+++ gcc/testsuite/gcc.dg/vmx/ops.c (working copy)
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated"
} */
+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated
-flax-vector-conversions" } */
#include <altivec.h>
#include <stdlib.h>
extern char * *var_char_ptr;
Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c (revision 279852)
+++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c (working copy)
@@ -5,37 +5,38 @@
/* Expected instruction counts for Power 7 */
-/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 5 } } */
+/* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvadddp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */
-/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
-/* { dg-final { scan-assembler-times "vperm" 2 } } */
-/* { dg-final { scan-assembler-times "xvrdpic" 2 } } */
-/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
-/* { dg-final { scan-assembler-times "vmsumshs" 2 } } */
-/* { dg-final { scan-assembler-times "xxland" 13 } } */
-/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
-/* { dg-final { scan-assembler-times "xxsel" 4 } } */
-/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
-/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpi" 7 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaddadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmsubadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvsubdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmuldp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvperm\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmsubasp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmaddasp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmaddadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmsubadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvmsumshs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M} 12 } } */
+/* { dg-final { scan-assembler-times {\mxxlxor\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxsel\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvdivdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */
/* Source code for the test in vsx-vector-6.h */
#include "vsx-vector-6.h"
Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c (revision 279852)
+++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c (working copy)
@@ -5,45 +5,49 @@
/* Expected instruction counts for Power 8. */
-/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 6 { target le } } } */
-/* { dg-final { scan-assembler-times "xxlnor" 5 { target be } } } */
+/* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvadddp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 5 { target be } } } */
/* We generate xxlor instructions for many reasons other than or'ing vector
operands or calling __builtin_vec_or(), which means we cannot rely on
their usage counts being stable. Therefore, we just ensure at least one
xxlor instruction was generated. */
-/* { dg-final { scan-assembler "xxlor" } } */
+/* { dg-final { scan-assembler {\mxxlor\M} } } */
-/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */
-/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */
+/* { dg-final { scan-assembler-not {\mxvcmpeqdp\s} { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 { target be } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 6 { target be } } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 { target be } } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 2 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 4 } } */
-/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
-/* { dg-final { scan-assembler-times "vperm" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
-/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
-/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
-/* { dg-final { scan-assembler-times "xxland" 13 } } */
-/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
-/* { dg-final { scan-assembler-times "xxsel" 2 } } */
-/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
-/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaddadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmsubadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvsubdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmuldp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvperm\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmsubasp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmaddasp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmaddadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmsubadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvmsumshs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M} 12 } } */
+/* { dg-final { scan-assembler-times {\mxxlxor\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mxxsel\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvdivdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */
/* Source code for the test in vsx-vector-6.h */
#include "vsx-vector-6.h"
Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c (revision 279852)
+++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c (working copy)
@@ -13,26 +13,27 @@
operands or calling __builtin_vec_or(), which means we cannot rely on
their usage counts being stable. Therefore, we just ensure at least one
xxlor instruction was generated. */
-/* { dg-final { scan-assembler "xxlor" } } */
+/* { dg-final { scan-assembler {\mxxlor\M} } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp" 8 } } */
-/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
-/* { dg-final { scan-assembler-times "vperm" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
-/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
-/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
-/* { dg-final { scan-assembler-times "xxland" 13 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\M} 5 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\M} 8 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgedp\M} 8 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaddadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmsubadp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvsubdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmuldp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvperm[r]*\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvmsubasp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvnmaddasp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvmsumshs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxxland\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxlandc\M} 12 } } */
/* Source code for the test in vsx-vector-6.h */
#include "vsx-vector-6.h"
