Hi Kyrill
On 11/06/2019 03:59 PM, Kyrill Tkachov wrote:
Hi Mihail,
On 11/4/19 4:49 PM, Kyrill Tkachov wrote:
Hi Mihail,
On 10/23/19 10:26 AM, Mihail Ionescu wrote:
> [PATCH, GCC/ARM, 2/10] Add command line support
>
> Hi,
>
> === Context ===
>
> This patch is part of a patch series to add support for Armv8.1-M
> Mainline Security Extensions architecture. Its purpose is to add
> command-line support for that new architecture.
>
> === Patch description ===
>
> Besides the expected enabling of the new value for the -march
> command-line option (-march=armv8.1-m.main) and its extensions (see
> below), this patch disables support of the Security Extensions for this
> newly added architecture. This is done both by not including the cmse
> bit in the architecture description and by throwing an error message
> when user request Armv8.1-M Mainline Security Extensions. Note that
> Armv8-M Baseline and Mainline Security Extensions are still enabled.
>
> Only extensions for already supported instructions are implemented in
> this patch. Other extensions (MVE integer and float) will be added in
> separate patches. The following configurations are allowed for
Armv8.1-M
> Mainline with regards to FPU and implemented in this patch:
> + no FPU (+nofp)
> + single precision VFPv5 with FP16 (+fp)
> + double precision VFPv5 with FP16 (+fp.dp)
>
> ChangeLog entry are as follow:
>
> *** gcc/ChangeLog ***
>
> 2019-10-23 Mihail-Calin Ionescu <mihail.ione...@arm.com>
> 2019-10-23 Thomas Preud'homme <thomas.preudho...@arm.com>
>
> * config/arm/arm-cpus.in (armv8_1m_main): New feature.
> (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j,
ARMv6k,
> ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a,
ARMv7ve,
> ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
> ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r):
Reindent.
> (ARMv8_1m_main): New feature group.
> (armv8.1-m.main): New architecture.
> * config/arm/arm-tables.opt: Regenerate.
> * config/arm/arm.c (arm_arch8_1m_main): Define and default
> initialize.
> (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
> (arm_options_perform_arch_sanity_checks): Error out when
targeting
> Armv8.1-M Mainline Security Extensions.
> * config/arm/arm.h (arm_arch8_1m_main): Declare.
>
> *** gcc/testsuite/ChangeLog ***
>
> 2019-10-23 Mihail-Calin Ionescu <mihail.ione...@arm.com>
> 2019-10-23 Thomas Preud'homme <thomas.preudho...@arm.com>
>
> * lib/target-supports.exp
> (check_effective_target_arm_arch_v8_1m_main_ok): Define.
> (add_options_for_arm_arch_v8_1m_main): Likewise.
> (check_effective_target_arm_arch_v8_1m_main_multilib): Likewise.
>
> Testing: bootstrapped on arm-linux-gnueabihf and arm-none-eabi;
testsuite
> shows no regression.
>
> Is this ok for trunk?
>
Ok.
Something that I remembered last night upon reflection...
New command-line options (or arguments to them) need documentation in
invoke.texi.
Please add some either as part of this patch or as a separate patch if
you prefer.
I've added the missing cli options in invoke.texi.
Here's the updated ChangeLog:
2019-12-06 Mihail-Calin Ionescu <mihail.ione...@arm.com>
2019-12-16 Thomas Preud'homme <thomas.preudho...@arm.com>
* config/arm/arm-cpus.in (armv8_1m_main): New feature.
(ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
(ARMv8_1m_main): New feature group.
(armv8.1-m.main): New architecture.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
(arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
(arm_options_perform_arch_sanity_checks): Error out when targeting
Armv8.1-M Mainline Security Extensions.
* config/arm/arm.h (arm_arch8_1m_main): Declare.
* doc/invoke.texi: Document armv8.1-m.main.
*** gcc/testsuite/ChangeLog ***
2019-12-16 Mihail-Calin Ionescu <mihail.ione...@arm.com>
2019-12-16 Thomas Preud'homme <thomas.preudho...@arm.com>
* lib/target-supports.exp
(check_effective_target_arm_arch_v8_1m_main_ok): Define.
(add_options_for_arm_arch_v8_1m_main): Likewise.
(check_effective_target_arm_arch_v8_1m_main_multilib): Likewise.
Regards,
Mihail
Thanks,
Kyrill
Thanks,
Kyrill
> Best regards,
>
> Mihail
>
>
> ############### Attachment also inlined for ease of reply
> ###############
>
>
> diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
> index
>
f8a3b3db67a537163bfe787d78c8f2edc4253ab3..652f2a4be9388fd7a74f0ec4615a292fd1cfcd36
> 100644
> --- a/gcc/config/arm/arm-cpus.in
> +++ b/gcc/config/arm/arm-cpus.in
> @@ -126,6 +126,9 @@ define feature armv8_5
> # M-Profile security extensions.
> define feature cmse
>
> +# Architecture rel 8.1-M.
> +define feature armv8_1m_main
> +
> # Floating point and Neon extensions.
> # VFPv1 is not supported in GCC.
>
> @@ -223,21 +226,21 @@ define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4
> fpv5 fp16conv fp_dbl ALL_SIMD_I
> # -mfpu support.
> define fgroup ALL_FP fp16 ALL_FPU_INTERNAL
>
> -define fgroup ARMv4 armv4 notm
> -define fgroup ARMv4t ARMv4 thumb
> -define fgroup ARMv5t ARMv4t armv5t
> -define fgroup ARMv5te ARMv5t armv5te
> -define fgroup ARMv5tej ARMv5te
> -define fgroup ARMv6 ARMv5te armv6 be8
> -define fgroup ARMv6j ARMv6
> -define fgroup ARMv6k ARMv6 armv6k
> -define fgroup ARMv6z ARMv6
> -define fgroup ARMv6kz ARMv6k quirk_armv6kz
> -define fgroup ARMv6zk ARMv6k
> -define fgroup ARMv6t2 ARMv6 thumb2
> +define fgroup ARMv4 armv4 notm
> +define fgroup ARMv4t ARMv4 thumb
> +define fgroup ARMv5t ARMv4t armv5t
> +define fgroup ARMv5te ARMv5t armv5te
> +define fgroup ARMv5tej ARMv5te
> +define fgroup ARMv6 ARMv5te armv6 be8
> +define fgroup ARMv6j ARMv6
> +define fgroup ARMv6k ARMv6 armv6k
> +define fgroup ARMv6z ARMv6
> +define fgroup ARMv6kz ARMv6k quirk_armv6kz
> +define fgroup ARMv6zk ARMv6k
> +define fgroup ARMv6t2 ARMv6 thumb2
> # This is suspect. ARMv6-m doesn't really pull in any useful features
> # from ARMv5* or ARMv6.
> -define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8
> +define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8
> # This is suspect, the 'common' ARMv7 subset excludes the thumb2
> 'DSP' and
> # integer SIMD instructions that are in ARMv6T2. */
> define fgroup ARMv7 ARMv6m thumb2 armv7
> @@ -256,6 +259,10 @@ define fgroup ARMv8_5a ARMv8_4a armv8_5 sb
predres
> define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
> define fgroup ARMv8m_main ARMv7m armv8 cmse
> define fgroup ARMv8r ARMv8a
> +# Feature cmse is omitted to disable Security Extensions support
> while secure
> +# code compiled by GCC does not preserve FP context as allowed by
> Armv8.1-M
> +# Mainline.
> +define fgroup ARMv8_1m_main ARMv7m armv8 armv8_1m_main
>
> # Useful combinations.
> define fgroup VFPv2 vfpv2
> @@ -644,6 +651,17 @@ begin arch armv8-r
> option nofp remove ALL_FP
> end arch armv8-r
>
> +begin arch armv8.1-m.main
> + tune for cortex-m7
> + tune flags CO_PROC
> + base 8M_MAIN
> + isa ARMv8_1m_main
> +# fp => FPv5-sp-d16; fp.dp => FPv5-d16
> + option fp add FPv5 fp16
> + option fp.dp add FPv5 FP_DBL fp16
> + option nofp remove ALL_FP
> +end arch armv8.1-m.main
> +
> begin arch iwmmxt
> tune for iwmmxt
> tune flags LDSCHED STRONG XSCALE
> diff --git a/gcc/config/arm/arm-tables.opt
b/gcc/config/arm/arm-tables.opt
> index
>
aeb5b3fbf629e5cfae4d5f6d4d5f1a9c7752a511..d059969904cb39fbe583487e4fbb23d4f9838718
> 100644
> --- a/gcc/config/arm/arm-tables.opt
> +++ b/gcc/config/arm/arm-tables.opt
> @@ -353,10 +353,13 @@ EnumValue
> Enum(arm_arch) String(armv8-r) Value(28)
>
> EnumValue
> -Enum(arm_arch) String(iwmmxt) Value(29)
> +Enum(arm_arch) String(armv8.1-m.main) Value(29)
>
> EnumValue
> -Enum(arm_arch) String(iwmmxt2) Value(30)
> +Enum(arm_arch) String(iwmmxt) Value(30)
> +
> +EnumValue
> +Enum(arm_arch) String(iwmmxt2) Value(31)
>
> Enum
> Name(arm_fpu) Type(enum fpu_type)
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index
>
8b67c9c3657b312be223ab60c01969958baa9ed3..307f1b59ba4456c901c8cb842d9961a740b6bb8d
> 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -456,6 +456,10 @@ extern int arm_arch8_3;
> /* Nonzero if this chip supports the ARM Architecture 8.4
extensions. */
> extern int arm_arch8_4;
>
> +/* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline
> + extensions. */
> +extern int arm_arch8_1m_main;
> +
> /* Nonzero if this chip supports the FP16 instructions extension of
ARM
> Architecture 8.2. */
> extern int arm_fp16_inst;
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index
>
9f0975dc0710626ef46abecaa3a205e993821118..9aca9484a9cdc26d6afee25e81f06b4047df2174
> 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -903,6 +903,9 @@ int arm_arch8_3 = 0;
>
> /* Nonzero if this chip supports the ARM Architecture 8.4
extensions. */
> int arm_arch8_4 = 0;
> +/* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline
> + extensions. */
> +int arm_arch8_1m_main = 0;
>
> /* Nonzero if this chip supports the FP16 instructions extension of
ARM
> Architecture 8.2. */
> @@ -3642,6 +3645,8 @@ arm_option_reconfigure_globals (void)
> arm_arch8_2 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_2);
> arm_arch8_3 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_3);
> arm_arch8_4 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_4);
> + arm_arch8_1m_main = bitmap_bit_p (arm_active_target.isa,
> + isa_bit_armv8_1m_main);
> arm_arch_thumb1 = bitmap_bit_p (arm_active_target.isa,
isa_bit_thumb);
> arm_arch_thumb2 = bitmap_bit_p (arm_active_target.isa,
isa_bit_thumb2);
> arm_arch_xscale = bitmap_bit_p (arm_active_target.isa,
isa_bit_xscale);
> @@ -3727,6 +3732,9 @@ arm_options_perform_arch_sanity_checks (void)
> if (!arm_arch4 && arm_fp16_format != ARM_FP16_FORMAT_NONE)
> sorry ("__fp16 and no ldrh");
>
> + if (use_cmse && arm_arch8_1m_main)
> + error ("ARMv8.1-M Mainline Security Extensions are unsupported");
> +
> if (use_cmse && !arm_arch_cmse)
> error ("target CPU does not support ARMv8-M Security Extensions");
>
> diff --git a/gcc/testsuite/lib/target-supports.exp
> b/gcc/testsuite/lib/target-supports.exp
> index
>
6a1aaca9691b7fe9ae5e0e5b1874c7af34a3a6e3..5688aa7a6b7e8dad28aa553755b657464071a982
> 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -4242,10 +4242,11 @@ foreach { armfunc armflag armdefs } {
> v8a "-march=armv8-a" __ARM_ARCH_8A__
> v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
> v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
> + v8r "-march=armv8-r" __ARM_ARCH_8R__
> v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
> __ARM_ARCH_8M_BASE__
> v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
> - v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
> + v8_1m_main "-march=armv8.1-m.main -mthumb"
> __ARM_ARCH_8M_MAIN__ } {
> eval [string map [list FUNC $armfunc FLAG $armflag DEFS
$armdefs ] {
> proc check_effective_target_arm_arch_FUNC_ok { } {
> return [check_no_compiler_messages arm_arch_FUNC_ok
> assembly {
>
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 50379a0a10a96c7fd501b401adbd679737b7a322..b3e4c69c78c8e8390f01b83caf9e4811482ba0c0 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -126,6 +126,9 @@ define feature armv8_5
# M-Profile security extensions.
define feature cmse
+# Architecture rel 8.1-M.
+define feature armv8_1m_main
+
# Floating point and Neon extensions.
# VFPv1 is not supported in GCC.
@@ -223,21 +226,21 @@ define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_I
# -mfpu support.
define fgroup ALL_FP fp16 ALL_FPU_INTERNAL
-define fgroup ARMv4 armv4 notm
-define fgroup ARMv4t ARMv4 thumb
-define fgroup ARMv5t ARMv4t armv5t
-define fgroup ARMv5te ARMv5t armv5te
-define fgroup ARMv5tej ARMv5te
-define fgroup ARMv6 ARMv5te armv6 be8
-define fgroup ARMv6j ARMv6
-define fgroup ARMv6k ARMv6 armv6k
-define fgroup ARMv6z ARMv6
-define fgroup ARMv6kz ARMv6k quirk_armv6kz
-define fgroup ARMv6zk ARMv6k
-define fgroup ARMv6t2 ARMv6 thumb2
+define fgroup ARMv4 armv4 notm
+define fgroup ARMv4t ARMv4 thumb
+define fgroup ARMv5t ARMv4t armv5t
+define fgroup ARMv5te ARMv5t armv5te
+define fgroup ARMv5tej ARMv5te
+define fgroup ARMv6 ARMv5te armv6 be8
+define fgroup ARMv6j ARMv6
+define fgroup ARMv6k ARMv6 armv6k
+define fgroup ARMv6z ARMv6
+define fgroup ARMv6kz ARMv6k quirk_armv6kz
+define fgroup ARMv6zk ARMv6k
+define fgroup ARMv6t2 ARMv6 thumb2
# This is suspect. ARMv6-m doesn't really pull in any useful features
# from ARMv5* or ARMv6.
-define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8
+define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8
# This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and
# integer SIMD instructions that are in ARMv6T2. */
define fgroup ARMv7 ARMv6m thumb2 armv7
@@ -256,6 +259,10 @@ define fgroup ARMv8_5a ARMv8_4a armv8_5 sb predres
define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
define fgroup ARMv8m_main ARMv7m armv8 cmse
define fgroup ARMv8r ARMv8a
+# Feature cmse is omitted to disable Security Extensions support while secure
+# code compiled by GCC does not preserve FP context as allowed by Armv8.1-M
+# Mainline.
+define fgroup ARMv8_1m_main ARMv7m armv8 armv8_1m_main
# Useful combinations.
define fgroup VFPv2 vfpv2
@@ -644,6 +651,17 @@ begin arch armv8-r
option nofp remove ALL_FP
end arch armv8-r
+begin arch armv8.1-m.main
+ tune for cortex-m7
+ tune flags CO_PROC
+ base 8M_MAIN
+ isa ARMv8_1m_main
+# fp => FPv5-sp-d16; fp.dp => FPv5-d16
+ option fp add FPv5 fp16
+ option fp.dp add FPv5 FP_DBL fp16
+ option nofp remove ALL_FP
+end arch armv8.1-m.main
+
begin arch iwmmxt
tune for iwmmxt
tune flags LDSCHED STRONG XSCALE
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index aeb5b3fbf629e5cfae4d5f6d4d5f1a9c7752a511..d059969904cb39fbe583487e4fbb23d4f9838718 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -353,10 +353,13 @@ EnumValue
Enum(arm_arch) String(armv8-r) Value(28)
EnumValue
-Enum(arm_arch) String(iwmmxt) Value(29)
+Enum(arm_arch) String(armv8.1-m.main) Value(29)
EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(30)
+Enum(arm_arch) String(iwmmxt) Value(30)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(31)
Enum
Name(arm_fpu) Type(enum fpu_type)
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 5fad1e5bcc2bc448489fdc8239c676246bbc8879..2d1b2e1ec07c1b74faca51bd65d0a1b701ab7b58 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -456,6 +456,10 @@ extern int arm_arch8_3;
/* Nonzero if this chip supports the ARM Architecture 8.4 extensions. */
extern int arm_arch8_4;
+/* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline
+ extensions. */
+extern int arm_arch8_1m_main;
+
/* Nonzero if this chip supports the FP16 instructions extension of ARM
Architecture 8.2. */
extern int arm_fp16_inst;
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index eddd3ca93ed62915bee3a3f5a396f0be069bd31f..250929f1d65a183ff1416f722b9f308353718f07 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -906,6 +906,9 @@ int arm_arch8_3 = 0;
/* Nonzero if this chip supports the ARM Architecture 8.4 extensions. */
int arm_arch8_4 = 0;
+/* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline
+ extensions. */
+int arm_arch8_1m_main = 0;
/* Nonzero if this chip supports the FP16 instructions extension of ARM
Architecture 8.2. */
@@ -3640,6 +3643,8 @@ arm_option_reconfigure_globals (void)
arm_arch8_2 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_2);
arm_arch8_3 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_3);
arm_arch8_4 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_4);
+ arm_arch8_1m_main = bitmap_bit_p (arm_active_target.isa,
+ isa_bit_armv8_1m_main);
arm_arch_thumb1 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb);
arm_arch_thumb2 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb2);
arm_arch_xscale = bitmap_bit_p (arm_active_target.isa, isa_bit_xscale);
@@ -3725,6 +3730,9 @@ arm_options_perform_arch_sanity_checks (void)
if (!arm_arch4 && arm_fp16_format != ARM_FP16_FORMAT_NONE)
sorry ("__fp16 and no ldrh");
+ if (use_cmse && arm_arch8_1m_main)
+ error ("Armv8.1-M Mainline Security Extensions are unsupported");
+
if (use_cmse && !arm_arch_cmse)
error ("target CPU does not support ARMv8-M Security Extensions");
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index bf3ea3f6c046f652f81dd104ef0a4d03e26fff9a..fb4e7d1a4be341587dea8afc3a3c0b356fe09022 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -17385,6 +17385,7 @@ Permissible names are:
@samp{armv6-m}, @samp{armv6s-m},
@samp{armv7-m}, @samp{armv7e-m},
@samp{armv8-m.base}, @samp{armv8-m.main},
+@samp{armv8.1-m.main},
@samp{iwmmxt} and @samp{iwmmxt2}.
Additionally, the following architectures, which lack support for the
@@ -17720,6 +17721,18 @@ The single- and double-precision FPv5 floating-point instructions.
Disable the floating-point extensions.
@end table
+@item armv8.1-m.main
+@table @samp
+@item +fp
+The single-precision floating-point instructions.
+
+@item +fp.dp
+The single- and double-precision floating-point instructions.
+
+@item +nofp
+Disable the floating-point extension.
+@end table
+
@item armv8-m.main
@table @samp
@item +dsp
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 6f224fa81416e9f3f402abe3525e86df02313e6a..5451a9f33c1f5d30b7bc4fea3552f27ff6cab791 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4281,10 +4281,11 @@ foreach { armfunc armflag armdefs } {
v8a "-march=armv8-a" __ARM_ARCH_8A__
v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
+ v8r "-march=armv8-r" __ARM_ARCH_8R__
v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
__ARM_ARCH_8M_BASE__
v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
- v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
+ v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
proc check_effective_target_arm_arch_FUNC_ok { } {
return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
