On Fri, 2019-12-13 at 17:25 +0100, Stefan Franke wrote: > Hi there, > > I suggest this patch to allow architectures do substitute cc0_rtx with a > generated cc register. > > Why? If you are using a cc register plus your architecture as many > instructions which may clobber that cc register, some passes (e.g. gcse) > will reorder the insns. This can lead to the situation that an insn is > moved between a compare and it' consuming jump insn. Which yields > invalid code. (Note that at these stages clobbers are not yet tracked as > CLOBBER insns). > > To get around this behaviour you have to fake HAVE_CC0, e.g. by adding > some dummy code to your md file: > > (define_peephole2 [(set (match_operand 0 "" "") (cc0))] "" > [(const_int 0)] "") > > plus some empty macros. All of this can be handled by the arch > implementation, but not the check for the cc0 inside of > > int sets_cc0_p(const_rtx x) > > > Changelog > > gcc/jump.c: use rtx_equal do determine the identity of cc0_rtx This is wrong. cc0_rtx is a shared RTX expression. There can be only one. Pointer equality is the right way to test, not rtx_equal_p. Furthermore on a cc0 machine the setter and user are always consecutive in the RTL stream. The optimizers know they're not supposed to separate them.
Whatever you're doing, you're doing it wrong. jeff >
