On Thu, 5 Dec 2019 at 12:59, Richard Biener <rguent...@suse.de> wrote: > > On Thu, 5 Dec 2019, Christophe Lyon wrote: > > > Hi, > > > > > > On Tue, 3 Dec 2019 at 15:46, Richard Biener <rguent...@suse.de> wrote: > > > > > > > > > The PR shows I added the bail-out prematurely. > > > > > > Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. > > > > > > Richard. > > > > > > 2019-12-03 Richard Biener <rguent...@suse.de> > > > > > > PR tree-optimization/92758 > > > * tree-ssa-forwprop.c (simplify_vector_constructor): Restore > > > operation on uniform vectors. > > > > > > > This patch (r278938) causes a regression on aarch64: > > FAIL: gcc.target/aarch64/fmla_intrinsic_1.c scan-assembler-times > > fmla\\tv[0-9]+.2s, v[0-9]+.2s, v[0-9]+.2s\\[[0-9]+\\] 2 > > FAIL: gcc.target/aarch64/fmls_intrinsic_1.c scan-assembler-times > > fmls\\tv[0-9]+.2s, v[0-9]+.2s, v[0-9]+.2s\\[[0-9]+\\] 2 > > FAIL: gcc.target/aarch64/fmul_intrinsic_1.c scan-assembler-times > > fmul\\td[0-9]+, d[0-9]+, d[0-9]+ 1 > > FAIL: gcc.target/aarch64/fmul_intrinsic_1.c scan-assembler-times > > fmul\\tv[0-9]+.2d, v[0-9]+.2d, v[0-9]+.d\\[[0-9]+\\] 3 > > FAIL: gcc.target/aarch64/fmul_intrinsic_1.c scan-assembler-times > > fmul\\tv[0-9]+.2s, v[0-9]+.2s, v[0-9]+.s\\[[0-9]+\\] 2 > > FAIL: gcc.target/aarch64/simd/vmulx_laneq_f32_1.c scan-assembler-times > > fmulx[ \t]+[vV][0-9]+.2[sS], ?[vV][0-9]+.2[sS], > > ?[vV][0-9]+.[sS]\\[0\\]\n 1 > > FAIL: gcc.target/aarch64/simd/vmulx_laneq_f32_1.c scan-assembler-times > > fmulx[ \t]+[vV][0-9]+.2[sS], ?[vV][0-9]+.2[sS], > > ?[vV][0-9]+.[sS]\\[1\\]\n 1 > > FAIL: gcc.target/aarch64/simd/vmulx_laneq_f32_1.c scan-assembler-times > > fmulx[ \t]+[vV][0-9]+.2[sS], ?[vV][0-9]+.2[sS], > > ?[vV][0-9]+.[sS]\\[2\\]\n 1 > > FAIL: gcc.target/aarch64/simd/vmulx_laneq_f32_1.c scan-assembler-times > > fmulx[ \t]+[vV][0-9]+.2[sS], ?[vV][0-9]+.2[sS], > > ?[vV][0-9]+.[sS]\\[3\\]\n 1 > > FAIL: gcc.target/aarch64/simd/vmulx_laneq_f64_1.c scan-assembler-times > > fmulx[ \t]+[dD][0-9]+, ?[dD][0-9]+, ?[vV][0-9]+.[dD]\\[0\\]\n 1 > > FAIL: gcc.target/aarch64/simd/vmulx_laneq_f64_1.c scan-assembler-times > > fmulx[ \t]+[dD][0-9]+, ?[dD][0-9]+, ?[vV][0-9]+.[dD]\\[1\\]\n 1 > > FAIL: gcc.target/aarch64/singleton_intrinsics_1.c scan-assembler-times > > aarch64_get_lanev2di 2 > > > > Do you want me to file a PR? > > Yes please. > OK, this is PR92822
> Richard. > > > Thanks, > > > > Christophe > > > > > > > Index: gcc/tree-ssa-forwprop.c > > > =================================================================== > > > --- gcc/tree-ssa-forwprop.c (revision 278930) > > > +++ gcc/tree-ssa-forwprop.c (working copy) > > > @@ -2043,8 +2043,7 @@ simplify_vector_constructor (gimple_stmt > > > gcc_checking_assert (TREE_CODE (op) == CONSTRUCTOR > > > && TREE_CODE (type) == VECTOR_TYPE); > > > > > > - if (!TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts) > > > - || uniform_vector_p (op)) > > > + if (!TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts)) > > > return false; > > > elem_type = TREE_TYPE (type); > > > elem_size = TREE_INT_CST_LOW (TYPE_SIZE (elem_type)); > > > > -- > Richard Biener <rguent...@suse.de> > SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg, > Germany; GF: Felix Imendörffer; HRB 36809 (AG Nuernberg)
