On 11/16/19 6:42 AM, Richard Sandiford wrote:
> SVE has two composite conditions:
>
> pmore == at least one bit set && last bit clear
> plast == no bits set || last bit set
>
> So in general we generate them from:
>
> A: CC = test bits
> B: reg1 = first condition
> C: CC = test bits
> D: reg2 = second condition
> E: result = (reg1 op reg2) where op is || or &&
>
> To fold all this into a single test, we need to be able to remove
> the redundant C (the cse.c patch) and then fold B, D and E down to
> a single condition (the simplify-rtx.c patch).
>
> The underlying conditions are unsigned, so the simplify-rtx.c part needs
> to support both unsigned comparisons and AND. However, to avoid opening
> the can of worms that is ANDing FP comparisons for unordered inputs,
> I've restricted the new AND handling to cases in which NaNs can be
> ignored. I think this is still a strict extension of what we have now,
> it just doesn't go as far as it could. Going further would need an
> entirely different set of testcases so I think would make more sense
> as separate work.
>
> Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?
>
> Richard
>
>
> 2019-11-16 Richard Sandiford <richard.sandif...@arm.com>
>
> gcc/
> * cse.c (cse_insn): Delete no-op register moves too.
> * simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
> Take a second comparison to control the value for NE.
> (mask_to_comparison): Handle unsigned comparisons.
> (simplify_logical_relational_operation): Likewise. Update call
> to comparison_to_mask. Handle AND if !HONOR_NANs.
> (simplify_binary_operation_1): Call the above for AND too.
>
> gcc/testsuite/
> * gcc.target/aarch64/sve/acle/asm/ptest_pmore.c: New test.
OK
jeff