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https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01356.html

On Fri, 18 Oct 2019 at 15:18, Christophe Lyon
<christophe.l...@linaro.org> wrote:
>
> Hi,
>
> This patch extends support for -mpure-code to all thumb-1 processors,
> by removing the need for MOVT.
>
> Symbol addresses are built using upper8_15, upper0_7, lower8_15 and
> lower0_7 relocations, and constants are built using sequences of
> movs/adds and lsls instructions.
>
> The extension of the *thumb1_movhf pattern uses always the same size
> (6) although it can emit a shorter sequence when possible. This is
> similar to what *arm32_movhf already does.
>
> CASE_VECTOR_PC_RELATIVE is now false with -mpure-code, to avoid
> generating invalid assembly code with differences from symbols from
> two different sections (the difference cannot be computed by the
> assembler).
>
> Tests pr45701-[12].c needed a small adjustment to avoid matching
> upper8_15 when looking for the r8 register.
>
> Test no-literal-pool.c is augmented with __fp16, so it now uses
> -mfp16-format=ieee.
>
> Test thumb1-Os-mult.c generates an inline code sequence with
> -mpure-code and computes the multiplication by using a sequence of
> add/shift rather than using the multiply instruction, so we skip it in
> presence of -mpure-code.
>
> With -mcpu=cortex-m0, the pure-code/no-literal-pool.c fails because
> code like:
> static char *p = "Hello World";
> char *
> testchar ()
> {
>   return p + 4;
> }
> generates 2 indirections (I removed non-essential directives/code)
>         .section        .rodata
> .LC0:
> .ascii  "Hello World\000"
> .data
> p:
> .word   .LC0
> .section        .rodata
> .LC2:
> .word   p
> .section .text,"0x20000006",%progbits
> testchar:
> push    {r7, lr}
> add     r7, sp, #0
> movs    r3, #:upper8_15:#.LC2
> lsls    r3, #8
> adds    r3, #:upper0_7:#.LC2
> lsls    r3, #8
> adds    r3, #:lower8_15:#.LC2
> lsls    r3, #8
> adds    r3, #:lower0_7:#.LC2
> ldr     r3, [r3]
> ldr     r3, [r3]
> adds    r3, r3, #4
> movs    r0, r3
> mov     sp, r7
> @ sp needed
> pop     {r7, pc}
>
> By contrast, when using -mcpu=cortex-m4, the code looks like:
>         .section        .rodata
> .LC0:
> .ascii  "Hello World\000"
> .data
> p:
> .word   .LC0
> testchar:
> push    {r7}
> add     r7, sp, #0
> movw    r3, #:lower16:p
> movt    r3, #:upper16:p
> ldr     r3, [r3]
> adds    r3, r3, #4
> mov     r0, r3
> mov     sp, r7
> pop     {r7}
> bx      lr
>
> I haven't found yet how to make code for cortex-m0 apply upper/lower
> relocations to "p" instead of .LC2. The current code looks functional,
> but could be improved.
>
> OK as-is?
>
> Thanks,
>
> Christophe

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