This patch adds an explicit (0),1 to labels used with the @pcrel syntax. The
intention is make sure that the user does not use an instruction that assumes
PC-relative instructions can take a base register (as I did in the V4 patches).
This was V5 patch #15. This patch is optional. If it is not applied the code
will still work.
Along with the other patches, I have done bootstraps on a little endian power8
system, and there were no regressions in the test suite. I have built both
Spec 2006 and Spec 2017 with all of these patches installed using -mcpu=future,
and there were no failures. Can I check this into the trunk?
Note, I may have limited email access on October 17th and 18th, 2019.
2019-10-15 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/rs6000.c (print_operand_address): Add (0),1 to
@pcrel to catch errant usage.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 277029)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -13272,7 +13272,10 @@ print_operand_address (FILE *file, rtx x
if (SYMBOL_REF_P (x) && !SYMBOL_REF_LOCAL_P (x))
fprintf (file, "@got");
- fprintf (file, "@pcrel");
+ /* Specifically add (0),1 to catch uses where a @pcrel was added to a an
+ address with a base register, since the hardware does not support
+ adding a base register to a PC-relative address. */
+ fprintf (file, "@pcrel(0),1");
}
else if (SYMBOL_REF_P (x) || GET_CODE (x) == CONST
|| GET_CODE (x) == LABEL_REF)
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
