On 17/09/2019 15:59, Richard Sandiford wrote:
Since no_insn patterns expand to no instructions, they shouldn't count against the issue rate, just like USEs and CLOBBERs don't.Tested on aarch64-linux-gnu and armeab-none-eabi. OK to install? Richard 2019-09-17 Richard Sandiford <richard.sandif...@arm.com> gcc/ * config/aarch64/aarch64.c (aarch64_sched_variable_issue): New function. (TARGET_SCHED_VARIABLE_ISSUE): New macro. * config/arm/arm.c (arm_sched_variable_issue): New function. (TARGET_SCHED_VARIABLE_ISSUE): New macro.
OK. R.
Index: gcc/config/aarch64/aarch64.c =================================================================== --- gcc/config/aarch64/aarch64.c 2019-09-17 15:27:31.000000000 +0100 +++ gcc/config/aarch64/aarch64.c 2019-09-17 15:57:58.012427831 +0100 @@ -11804,6 +11804,23 @@ aarch64_sched_issue_rate (void) return aarch64_tune_params.issue_rate; }+/* Implement TARGET_SCHED_VARIABLE_ISSUE. */+static int +aarch64_sched_variable_issue (FILE *, int, rtx_insn *insn, int more) +{ + if (DEBUG_INSN_P (insn)) + return more; + + rtx_code code = GET_CODE (PATTERN (insn)); + if (code == USE || code == CLOBBER) + return more; + + if (get_attr_type (insn) == TYPE_NO_INSN) + return more; + + return more - 1; +} + static int aarch64_sched_first_cycle_multipass_dfa_lookahead (void) { @@ -20584,6 +20601,9 @@ #define TARGET_SCALAR_MODE_SUPPORTED_P a #undef TARGET_SCHED_ISSUE_RATE #define TARGET_SCHED_ISSUE_RATE aarch64_sched_issue_rate+#undef TARGET_SCHED_VARIABLE_ISSUE+#define TARGET_SCHED_VARIABLE_ISSUE aarch64_sched_variable_issue + #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ aarch64_sched_first_cycle_multipass_dfa_lookahead Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c 2019-09-17 15:27:10.378074038 +0100 +++ gcc/config/arm/arm.c 2019-09-17 15:57:58.020427772 +0100 @@ -257,6 +257,7 @@ static bool arm_sched_can_speculate_insn static bool arm_macro_fusion_p (void); static bool arm_cannot_copy_insn_p (rtx_insn *); static int arm_issue_rate (void); +static int arm_sched_variable_issue (FILE *, int, rtx_insn *, int); static int arm_first_cycle_multipass_dfa_lookahead (void); static int arm_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *, int); static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; @@ -665,6 +666,9 @@ #define TARGET_MIN_ANCHOR_OFFSET -4088 #undef TARGET_SCHED_ISSUE_RATE #define TARGET_SCHED_ISSUE_RATE arm_issue_rate+#undef TARGET_SCHED_VARIABLE_ISSUE+#define TARGET_SCHED_VARIABLE_ISSUE arm_sched_variable_issue + #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ arm_first_cycle_multipass_dfa_lookahead @@ -28495,6 +28499,23 @@ arm_issue_rate (void) return current_tune->issue_rate; }+/* Implement TARGET_SCHED_VARIABLE_ISSUE. */+static int +arm_sched_variable_issue (FILE *, int, rtx_insn *insn, int more) +{ + if (DEBUG_INSN_P (insn)) + return more; + + rtx_code code = GET_CODE (PATTERN (insn)); + if (code == USE || code == CLOBBER) + return more; + + if (get_attr_type (insn) == TYPE_NO_INSN) + return more; + + return more - 1; +} + /* Return how many instructions should scheduler lookahead to choose the best one. */ static int
