2019-09-12 Uroš Bizjak <ubiz...@gmail.com>
PR tree-optimization/89386
* config/i386/sse.md (smulhrs<mode>3): New expander.
(smulhrsv4hi3): Ditto.
testsuite/ChangeLog:
2019-09-12 Uroš Bizjak <ubiz...@gmail.com>
PR tree-optimization/89386
* gcc.target/i386/pr89386.c: New test.
* gcc.target/i386/pr89386-1.c: Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: gcc/config/i386/sse.md
===================================================================
--- gcc/config/i386/sse.md (revision 275688)
+++ gcc/config/i386/sse.md (working copy)
@@ -16475,6 +16475,26 @@
ix86_fixup_binary_operands_no_copy (MULT, <MODE>mode, operands);
})
+(define_expand "smulhrs<mode>3"
+ [(set (match_operand:VI2_AVX2 0 "register_operand")
+ (truncate:VI2_AVX2
+ (lshiftrt:<ssedoublemode>
+ (plus:<ssedoublemode>
+ (lshiftrt:<ssedoublemode>
+ (mult:<ssedoublemode>
+ (sign_extend:<ssedoublemode>
+ (match_operand:VI2_AVX2 1 "nonimmediate_operand"))
+ (sign_extend:<ssedoublemode>
+ (match_operand:VI2_AVX2 2 "nonimmediate_operand")))
+ (const_int 14))
+ (match_dup 3))
+ (const_int 1))))]
+ "TARGET_SSSE3"
+{
+ operands[3] = CONST1_RTX(<MODE>mode);
+ ix86_fixup_binary_operands_no_copy (MULT, <MODE>mode, operands);
+})
+
(define_insn "*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>"
[(set (match_operand:VI2_AVX2 0 "register_operand" "=x,x,v")
(truncate:VI2_AVX2
@@ -16502,6 +16522,26 @@
(set_attr "prefix" "orig,maybe_evex,evex")
(set_attr "mode" "<sseinsnmode>")])
+(define_expand "smulhrsv4hi3"
+ [(set (match_operand:V4HI 0 "register_operand")
+ (truncate:V4HI
+ (lshiftrt:V4SI
+ (plus:V4SI
+ (lshiftrt:V4SI
+ (mult:V4SI
+ (sign_extend:V4SI
+ (match_operand:V4HI 1 "register_operand"))
+ (sign_extend:V4SI
+ (match_operand:V4HI 2 "register_operand")))
+ (const_int 14))
+ (match_dup 3))
+ (const_int 1))))]
+ "TARGET_MMX_WITH_SSE && TARGET_SSSE3"
+{
+ operands[3] = CONST1_RTX(V4HImode);
+ ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);
+})
+
(define_expand "ssse3_pmulhrswv4hi3"
[(set (match_operand:V4HI 0 "register_operand")
(truncate:V4HI
Index: gcc/testsuite/gcc.target/i386/pr89386-1.c
===================================================================
--- gcc/testsuite/gcc.target/i386/pr89386-1.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr89386-1.c (working copy)
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mssse3 -O2 -ftree-vectorize" } */
+
+#define N 4
+
+short a[N], b[N], c[N];
+
+int foo (void)
+{
+ int i;
+
+ for (i = 0; i < N; i++)
+ a[i] = ((((int) b[i] * (int) c[i]) >> 14) + 1) >> 1;
+}
+
+/* { dg-final { scan-assembler "pmulhrsw" } } */
Index: gcc/testsuite/gcc.target/i386/pr89386.c
===================================================================
--- gcc/testsuite/gcc.target/i386/pr89386.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr89386.c (working copy)
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mssse3 -O2 -ftree-vectorize" } */
+
+#define N 1024
+
+short a[N], b[N], c[N];
+
+int foo (void)
+{
+ int i;
+
+ for (i = 0; i < N; i++)
+ a[i] = ((((int) b[i] * (int) c[i]) >> 14) + 1) >> 1;
+}
+
+/* { dg-final { scan-assembler "pmulhrsw" } } */
