As described in the PR, several atomic tests were failing on bi-arch
32-bit x86 for the 64-bit multilib. As Uros found, this is obvious and
corrected by the following patch, which also fixes a typo in
atomic-other-int128.c.
Tested with the appropriate runtest invocations on i386-pc-solaris2.10
and amd64-pc-solaris2.10, no change on the latter, the 64-bit tests pass
now (or are unsupported for the simulate-thread tests with gdb 7.1;
those fail instead with gdb 7.3.1 ;-).
Ok for mainline?
Rainer
2011-11-23 Rainer Orth <r...@cebitec.uni-bielefeld.de>
PR testsuite/51258
* gcc.dg/atomic-compare-exchange-5.c: Add -mcx16 on i?86-*-*.
* gcc.dg/atomic-exchange-5.c: Likewise.
* gcc.dg/atomic-load-5.c: Likewise.
* gcc.dg/atomic-op-5.c: Likewise.
* gcc.dg/atomic-store-5.c: Likewise.
* gcc.dg/simulate-thread/atomic-other-int128.c: Fix typo.
# HG changeset patch
# Parent ad316ae6941ee37a3133fc84f8281ae9c07ebefa
Fix several atomic tests on 32-bit x86 (PR testsuite/51258)
diff --git a/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c b/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c
--- a/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c
@@ -2,7 +2,7 @@
values with each valid memory model. */
/* { dg-do run } */
/* { dg-require-effective-target sync_int_128 } */
-/* { dg-options "-mcx16" { target { x86_64-*-* } } } */
+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
/* Test the execution of __atomic_compare_exchange_n builtin for an int_128. */
diff --git a/gcc/testsuite/gcc.dg/atomic-exchange-5.c b/gcc/testsuite/gcc.dg/atomic-exchange-5.c
--- a/gcc/testsuite/gcc.dg/atomic-exchange-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-exchange-5.c
@@ -2,7 +2,7 @@
values with each valid memory model. */
/* { dg-do run } */
/* { dg-require-effective-target sync_int_128 } */
-/* { dg-options "-mcx16" { target { x86_64-*-* } } } */
+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
/* Test the execution of the __atomic_X builtin for a 16 byte value. */
diff --git a/gcc/testsuite/gcc.dg/atomic-load-5.c b/gcc/testsuite/gcc.dg/atomic-load-5.c
--- a/gcc/testsuite/gcc.dg/atomic-load-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-load-5.c
@@ -2,7 +2,7 @@
values with each valid memory model. */
/* { dg-do run } */
/* { dg-require-effective-target sync_int_128 } */
-/* { dg-options "-mcx16" { target { x86_64-*-* } } } */
+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
extern void abort(void);
diff --git a/gcc/testsuite/gcc.dg/atomic-op-5.c b/gcc/testsuite/gcc.dg/atomic-op-5.c
--- a/gcc/testsuite/gcc.dg/atomic-op-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-op-5.c
@@ -2,7 +2,7 @@
values with each valid memory model. */
/* { dg-do run } */
/* { dg-require-effective-target sync_int_128 } */
-/* { dg-options "-mcx16" { target { x86_64-*-* } } } */
+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
/* Test the execution of the __atomic_*OP builtin routines for an int_128. */
diff --git a/gcc/testsuite/gcc.dg/atomic-store-5.c b/gcc/testsuite/gcc.dg/atomic-store-5.c
--- a/gcc/testsuite/gcc.dg/atomic-store-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-store-5.c
@@ -2,7 +2,7 @@
values with each valid memory model. */
/* { dg-do run } */
/* { dg-require-effective-target sync_int_128 } */
-/* { dg-options "-mcx16" { target { x86_64-*-* } } } */
+/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
/* Test the execution of the __atomic_store_n builtin for a 16 byte value. */
diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
@@ -1,6 +1,6 @@
/* { dg-do link } */
/* { dg-require-effective-target sync_int_128 } */
-/* { dg-options "-mcx16" { target { x86_64-*-* i?86-*-*] } } } */
+/* { dg-options "-mcx16" { target { x86_64-*-* i?86-*-* } } } */
/* { dg-final { simulate-thread } } */
#include <stdio.h>
--
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University
